<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">JPEE</journal-id><journal-title-group><journal-title>Journal of Power and Energy Engineering</journal-title></journal-title-group><issn pub-type="epub">2327-588X</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/jpee.2019.71004</article-id><article-id pub-id-type="publisher-id">JPEE-90036</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Engineering</subject></subj-group></article-categories><title-group><article-title>
 
 
  Low Voltage Ride through Control Capability of a Large Grid Connected PV System Combining DC Chopper and Current Limiting Techniques
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Ronald</surname><given-names>Ntare</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Nabil</surname><given-names>H. Abbasy</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Karim</surname><given-names>H. M. Youssef</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib></contrib-group><aff id="aff1"><addr-line>Department of Electrical Power &amp;amp; Machines Engineering, Faculty of Engineering, Alexandria University, Alexandria, Egypt</addr-line></aff><pub-date pub-type="epub"><day>03</day><month>01</month><year>2019</year></pub-date><volume>07</volume><issue>01</issue><fpage>62</fpage><lpage>79</lpage><history><date date-type="received"><day>10,</day>	<month>December</month>	<year>2018</year></date><date date-type="rev-recd"><day>18,</day>	<month>January</month>	<year>2019</year>	</date><date date-type="accepted"><day>21,</day>	<month>January</month>	<year>2019</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
  This paper presents the development and performance capability of a comprehensive Low voltage ride through (LVRT) control scheme that makes use of both the DC chopper and the current limiting based on the required reactive power during fault time. The study is conducted on an 8.5 MW single stage PV power plant (PVPP) connected to the Rwandan grid. In the event of fault disturbance, this control scheme helps to overcome the problems of excessive DC-link voltage by fast activation of the DC chopper operation. At the same instance, AC current is limited to the maximum rating of the inverter as a function of the injected reactive current. This helps overcome AC-over- current that may possibly lead to damage or disconnection of the inverter. The control scheme also ensures voltage support and power balance through the injection of reactive current as per grid code requirements. Selected simulations using MATLAB are carried out in the events of different kinds of fault caused voltage dips. Results demonstrate the effectiveness of the proposed LVRT control scheme.
 
</p></abstract><kwd-group><kwd>Grid Connected Photovoltaic (PV) Power Plants (GCPSs)</kwd><kwd> Voltage Dips</kwd><kwd> Low Voltage Ride Through (LVRT)</kwd><kwd> Grid Code (GC)</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>Grid connected Photovoltaic (PV) systems have become the most important source of renewable energy in modern power systems [<xref ref-type="bibr" rid="scirp.90036-ref1">1</xref>]. Previously, when PV systems were poorly diffused and the appropriate standards and industrial codes required by the distribution system operators were not in force, the focus was on the protection tripping when grid voltage variations occurred [<xref ref-type="bibr" rid="scirp.90036-ref2">2</xref>]. In [<xref ref-type="bibr" rid="scirp.90036-ref3">3</xref>] , studies focused on the effects of power quality issues regarding GCPSs and the protection of different topologies of PV inverter during disturbances. It was always a requirement for the inverter to disconnect directly to avoid the islanding problem [<xref ref-type="bibr" rid="scirp.90036-ref3">3</xref>]. Now days, with the increasing PV systems penetration levels into the power system, the disconnection with grid during disturbances is no longer feasible as it can lead to stability, reliability and operation problems [<xref ref-type="bibr" rid="scirp.90036-ref4">4</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref5">5</xref>]. The technological advancement in power systems has enabled the elaboration of specific technical requirements for the connection of PV power plants (PVPPs) into the existing power grids. Fault ride through at both low and high voltages is one of the mandatory requirements of the PVPPs. Majority of the system disturbances such as faults occur at the low voltage side of the interconnected power system. Therefore, of recent the LVRT requirement has been widely developed and integrated in the modern grid codes. In compliance with the requirement the PVPP withstand grid voltage dips to a certain percentage of the nominal voltage (down to 0 in some GCs) for a specific duration as depicted in <xref ref-type="fig" rid="fig1">Figure 1</xref> [<xref ref-type="bibr" rid="scirp.90036-ref1">1</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref6">6</xref>]. Area A represents the nominal operating voltage at the point of common coupling (PCC), where the PVPP works continuously. Within area B, the PVPP has to withstand the voltage dip and remain connected to the system for a period of time (t<sub>o</sub> → t<sub>1</sub>). Otherwise, it will be disconnected. Upon recovery of the PCC voltage in area C to V<sub>1</sub> within time t<sub>2</sub>, the PVPP remains under continuous operation without disconnection. The values of V<sub>o</sub>, V<sub>1</sub>, t<sub>1</sub>, and t<sub>2</sub> differ from one GC to another based on the standards and characteristics of the national grid. Several countries have developed and implemented LVRT into grid code connection requirement. In this work, the LVRT requirements for large-scale GCPSs have been adopted from the German grid code [<xref ref-type="bibr" rid="scirp.90036-ref6">6</xref>]. The requirement stipulates that the PVPP must not disconnect from the grid for 150 ms when the line voltage (V) drops to 0% of the nominal voltage (V<sub>n</sub>). Furthermore, the voltage should recover 90% from its pre-fault value within 0.15 seconds from the occurrence of the voltage dip. This not only keeps the inverter connected, but also supports the grid voltage recovery through injection of reactive power.</p><p>Fault caused voltage dips are considered as one of the most frequent and</p><p>harsh power quality events due to its effects on various power system components [<xref ref-type="bibr" rid="scirp.90036-ref7">7</xref>]. During such events, two major problems arise i.e. the first one involves dealing with the over voltage at the inverter’s DC side and an over current at the AC side while the second one deals with the injection of reactive current, considered as a solution to voltage recovery and support [<xref ref-type="bibr" rid="scirp.90036-ref8">8</xref>]. In the study of GCPSs, existing LVRT control strategies with dynamic voltage support (injection of reactive power), have been carried out on two-stage inverter based GCPSs. A method that applied the reactive power injection for GCPS based-on-German GC using-super capacitor energy-storage-system (SCESS) was proposed in [<xref ref-type="bibr" rid="scirp.90036-ref9">9</xref>].</p><p>The SCESS is connected-to-the-system via bi-directional buck-boost converter and then to dc-link in which it provides the grid with-both-active and-reactive-power using specific control in order to support utility-grid-during-the fault. But this control not only increases the-cost-but-also-effects the reliability of the system [<xref ref-type="bibr" rid="scirp.90036-ref8">8</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref9">9</xref>]. A probabilistic fuzzy neural network intelligent control to regulate and control the reactive power value under grid faults was also proposed in [<xref ref-type="bibr" rid="scirp.90036-ref10">10</xref>]. The above control methods inject reactive current during voltage dips. However, the issue of power balance and inverter protection during faults is not well addressed. In the application of single stage inverter based GCPS, less publications have addressed the prevention of excessive rise in DC link voltage, thus protecting the inverter as well as providing reactive power support to the grid.</p><p>In view of the above discussion, this paper presents a comprehensive LVRT control strategy that suppresses the excessive DC voltage and AC current as well as injecting reactive power for grid support during fault caused voltage dips. The study is demonstrated on a realistic model of a single stage three phase PVPP (8.5 MW) connected to the Rwandan grid under grid fault conditions. The LVRT requirement is adopted from the German GC for grid support. Selected simulation results present the effectiveness of the control strategy.</p></sec><sec id="s2"><title>2. Design of a Single Stage PVPP</title><p>The grid connected single-stage PV system under this study consists of different power stages as shown in <xref ref-type="fig" rid="fig2">Figure 2</xref>. It includes the PV array, maximum power point tracking (MPPT) technique, the dc-link capacitors, the three phase voltage source inverter (VSI), LC filter and the step up transformer at the point of common coupling with the distribution side of the grid. Modelling of the above-mentioned power stages is explained below.</p><sec id="s2_1"><title>2.1. PV Module Modeling</title><p><xref ref-type="fig" rid="fig3">Figure 3</xref> shows an equivalent circuit of the PV module, which consist of several PV cells. The output current and voltage relationship of PV module can be expressed using the following equations [<xref ref-type="bibr" rid="scirp.90036-ref11">11</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref12">12</xref>].</p><p>I p h − I d − I p − I L = 0 ⇒ I L = I p h − I d − I p (1)</p><p>( V d = V p ) = V S + V L ⇒ V d = R S I L + V L (2)</p><p>where I p = V p R p = V d R p , substitute V<sub>d</sub> from (2)</p><p>I p = I L R s + V L R p (3)</p><p>The diode current can be expressed as follows [<xref ref-type="bibr" rid="scirp.90036-ref11">11</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref13">13</xref>].</p><p>I d = I s a t ( e ( V d / m N s V T ) − 1 ) (4)</p><p>V T = K T q , substitute by V T in (4), consequently</p><p>I d = I s a t ( e ( V d / m N s K T ) − 1 ) (5)</p><p>By substituting Equations (3) and (5) in (1), the load current can be written as below;</p><p>I L = I p h − I s a t ( e ( q V d / m N s K T ) − 1 ) − I L R s + V L R p (6)</p><p>where I<sub>ph</sub>, I<sub>d</sub>, I<sub>p</sub> and I<sub>sat</sub> are the photo current, diode current of the PV cell, shunt current, and the reverse saturation current of the solar module, respectively. N<sub>s</sub> is the number of cells connected in series, V<sub>T</sub> is the thermal voltage and equals to 25.7 V at 25˚C and m is the ideality factor of the diode (1 - 5 [V<sub>T</sub>]). K is the Boltzmann constant (1.381 &#215; 10<sup>−23</sup> J/K) and q is the charge of the electron (1.6021 &#215; 10<sup>−19</sup>). R<sub>s</sub> and R<sub>p</sub> are the equivalent series and parallel resistance of the solar module, respectively. I<sub>ph</sub> is affected by sun irradiance and temperature. The influences of these two factors can be expressed by the following equation [<xref ref-type="bibr" rid="scirp.90036-ref14">14</xref>].</p><p>I p h = [ I s c + α i ( T − 25 ) ] G G r e f (7)</p><p>I<sub>ph</sub> represents the photocurrent at nominal PV standard tests condition (STC, normally 25˚C and 1000 W/m<sup>2</sup>) for temperature and irradiation. I<sub>sc</sub> is the nominal short circuit current of the module. G and G<sub>ref</sub> are the amount of actual and nominal irradiation, respectively. T is the temperature degree in kelvin and α<sub>i</sub> is the current temperature coefficient. The I<sub>sat</sub> and I<sub>sc</sub> can be obtained according to the following equations [<xref ref-type="bibr" rid="scirp.90036-ref12">12</xref>].</p><p>I s c = I s c , r e f ( R P + R S R P ) (8)</p><p>I s a t = I s c , r e f + α i ( T − 25 ) e q ( V o c , r e f + α v ( T − 25 ) / N s m K T ) − 1 (9)</p><p>I<sub>sc,ref</sub> and V<sub>oc,ref</sub> are the short circuit current and open circuit voltage of the module at STC, respectively, whereas α<sub>y</sub> is the open circuit voltage temperature coefficient. These values are evaluated by the manufacturer as presented in <xref ref-type="table" rid="table1">Table 1</xref>. The output voltage and current of the module will be represented as follows,</p><p>I L = [ I s c + α i ( T − 25 ) ] G G r e f − I s a t ( e ( q V d / m N s K T ) − 1 ) − I L R s + V L R P (10)</p></sec><sec id="s2_2"><title>2.2. PV Array Sizing of the PVPP</title><p>The sizing of the proposed PV plant to generate a peak power of 8.5 MW is accomplished with 20 series modules and 1418 parallel strings. <xref ref-type="table" rid="table2">Table 2</xref> shows the theoretical calculation results of the designed PV array at STC.</p></sec><sec id="s2_3"><title>2.3. PV Control System during Normal Operation</title><p>The inverter is the most important equipment in the control structure of grid connected PV system. In this work, a voltage source inverter (VSI) is used for power conversion and control purposes. The DC-link voltage of the inverter is set at a value 719.4 V, a value equal to the maximum output voltage of the Array.</p><table-wrap id="table1" ><label><xref ref-type="table" rid="table1">Table 1</xref></label><caption><title> BYD 300P6C-36 PV module parameters at STC</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Parameter</th><th align="center" valign="middle" >Value</th></tr></thead><tr><td align="center" valign="middle" >Maximum Output power at STC (P<sub>max</sub>)</td><td align="center" valign="middle" >300 W</td></tr><tr><td align="center" valign="middle" >Open circuit voltage (V<sub>OC</sub>)</td><td align="center" valign="middle" >45.19 V</td></tr><tr><td align="center" valign="middle" >Short circuit current (I<sub>SC</sub>)</td><td align="center" valign="middle" >8.83 A</td></tr><tr><td align="center" valign="middle" >Maximum power point voltage (V<sub>mp</sub>)</td><td align="center" valign="middle" >35.97 V</td></tr><tr><td align="center" valign="middle" >Maximum power point current (I<sub>mp</sub>)</td><td align="center" valign="middle" >8.34 A</td></tr><tr><td align="center" valign="middle" >Number of cells (N<sub>S</sub>)</td><td align="center" valign="middle" >72</td></tr></tbody></table></table-wrap><p>This is to reduce the current ripple and regulate the voltage of the DC side of the inverter. In normal operation, the control system is as depicted in <xref ref-type="fig" rid="fig4">Figure 4</xref>. System design parameters were obtained from the network operator of the system</p><table-wrap id="table2" ><label><xref ref-type="table" rid="table2">Table 2</xref></label><caption><title> Theoretical calculation results of the designed PV array</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Parameter of the PV Array</th><th align="center" valign="middle" >Value</th></tr></thead><tr><td align="center" valign="middle" >Number of strings (N<sub>PVst</sub>)</td><td align="center" valign="middle" >1418</td></tr><tr><td align="center" valign="middle" >Number of series modules (N<sub>PVs</sub>)</td><td align="center" valign="middle" >20</td></tr><tr><td align="center" valign="middle" >Maximum current (I<sub>mPV</sub>)</td><td align="center" valign="middle" >N<sub>PVst</sub> &#215; I<sub>mp</sub> = 11,826.2 A</td></tr><tr><td align="center" valign="middle" >Maximum voltage (V<sub>mPV</sub>)</td><td align="center" valign="middle" >N<sub>PVs</sub> &#215; V<sub>mp</sub> = 719.4 V</td></tr><tr><td align="center" valign="middle" >DC Output power (P<sub>dc</sub>)</td><td align="center" valign="middle" >V<sub>mPV</sub> &#215; I<sub>mPV</sub> = 8.507 MW</td></tr><tr><td align="center" valign="middle" >Open Circuit-voltage (V<sub>PV</sub><sub>_OC</sub>)</td><td align="center" valign="middle" >N<sub>PVst</sub> &#215; V<sub>OC</sub> = 903.8 V</td></tr><tr><td align="center" valign="middle" >Open Circuit-current (I<sub>PV</sub><sub>_OC</sub>)</td><td align="center" valign="middle" >N<sub>PV</sub> &#215; I<sub>SC</sub>= 12,520.94 A</td></tr></tbody></table></table-wrap><table-wrap id="table3" ><label><xref ref-type="table" rid="table3">Table 3</xref></label><caption><title> System design parameters</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Parameter Description</th><th align="center" valign="middle" >Value</th></tr></thead><tr><td align="center" valign="middle" >Inverter size, P<sub>inv</sub><sub> </sub></td><td align="center" valign="middle" >8.5 MVA</td></tr><tr><td align="center" valign="middle" >Inverter voltage, V<sub>t</sub><sub> </sub></td><td align="center" valign="middle" >400 V</td></tr><tr><td align="center" valign="middle" >DC-Link capacitance, C<sub>dc</sub><sub> </sub></td><td align="center" valign="middle" >2 * 359.7 V</td></tr><tr><td align="center" valign="middle" >Frequency of Grid Supply, fs</td><td align="center" valign="middle" >50 Hz</td></tr><tr><td align="center" valign="middle" >Switching Frequency of inverter</td><td align="center" valign="middle" >20 kHz</td></tr><tr><td align="center" valign="middle" >Inductance of the Harmonic filter, L<sub>f</sub><sub> </sub></td><td align="center" valign="middle" >6.94 μL</td></tr><tr><td align="center" valign="middle" >Capacitance of the Harmonic filter, C<sub>f</sub><sub> </sub></td><td align="center" valign="middle" >8.45 mF</td></tr><tr><td align="center" valign="middle" >Damping resistor, R<sub>d</sub><sub> </sub></td><td align="center" valign="middle" >4.24e−4 Ω</td></tr><tr><td align="center" valign="middle" >Coupling transformer ratio, X<sub>1 </sub></td><td align="center" valign="middle" >0.4/15 kV</td></tr></tbody></table></table-wrap><p>under study, results are tabulated in <xref ref-type="table" rid="table3">Table 3</xref>. The control system is made up of the current loop used to regulate the grid current and is responsible for the protection and power quality issues [<xref ref-type="bibr" rid="scirp.90036-ref15">15</xref>]. The DC link voltage loop to control V<sub>dc</sub> level, necessary for the active power balancing in the system. The output of this loop is used as an active current reference ( i d ∗ ) whereas the reactive current reference ( i q ∗ ) is normally set to zero for a unity power factor. This indicates that the system only produces active power. Grid voltage and phase angle synchronization is achieved with the phase locked loop (PLL) based on (d-q) synchronous reference frame (SRF-PLL) θ<sub>PLL</sub> is obtained through the SRF-PLL that is used for abc to dq0 transformation as shown in (11) and (12) where f can be either three phase voltage or current. The inner loop PI controllers of VSI control mode produce active voltage reference ((V<sub>d</sub>) and reactive voltage reference (V<sub>q</sub>). Active and reactive voltage references are used for dq0 to abc transformation in order to get V<sub>abc</sub>. Lastly, V<sub>abc</sub> is sent to PWM signal generator to obtain switching pulses for the VSI.</p><p>[ f α f β ] = 2 3 [ 1 − 1 2 − 1 2 0 3 2 − 3 2 ] [ f a f b f c ] (11)</p><p>[ f d f q ] = [ cos θ ′ sin θ ′ − sin θ ′ cos θ ′ ] [ f α f β ] (12)</p><p>Subsequently, the maximum active and reactive power flowing through the inverter can be calculated as below;</p><p>P = 3 2 ( V d i d ) (13)</p><p>Q = 3 2 ( − V d i q ) (14)</p></sec></sec><sec id="s3"><title>3. The Study System: Rwandan Electrical Distribution System</title><p>The system under study is part of the of the Rwandan distribution system. In Rwanda, the distribution system as described in the Rwanda Grid Code covers a system of electrical lines with voltage from 30 kV and below [<xref ref-type="bibr" rid="scirp.90036-ref16">16</xref>]. The PVPP is connected to the grid through a 15 kV distribution line 10.8 km away to a step down substation connected to the 110 kV high voltage network through a 10 MVA. At the substation there are 4 T-OFF feeders supplying a series of main distribution substation (MDS) and loads. In the model, these have been aggregated into one load of 6.5 MW and 1.5 Mvar as clearly shown in <xref ref-type="fig" rid="fig5">Figure 5</xref>.</p></sec><sec id="s4"><title>4. Proposed LVRT Control Strategy during Abnormal Conditions</title><p>In a single-stage, three phase GCPS, the active power is controlled by regulating voltage of the dc-link capacitor during normal operation in order to extract the maximum power from the PV array. When a fault occurs, an imbalance occurs between the incoming power from the PV side and the power delivered to the electrical grid. This leads to transient excessive voltage at dc-side, and over-current at ac-side. In <xref ref-type="fig" rid="fig6">Figure 6</xref>, a combined control scheme is proposed to protect the DC accessories from excessive DC voltage and ac current while keeping the PVPP connected to the host power system. The proposed strategy uniquely makes use of a quick fault detection algorithm, combines DC chopper braking circuit, reactive current injection and active current limiting techniques. This also provides grid support through injection of reactive and active power based on the level of voltage dips. Upon occurrence of the fault, the fault is detected using a switching algorithm based on the threshold of the DC link voltage, the threshold V<sub>dc</sub> value is 725 V compared to the nominal V<sub>dc</sub> = 719.4 V [<xref ref-type="bibr" rid="scirp.90036-ref17">17</xref>]. The LVRT mode is switched on whenever the threshold value is exceeded as shown in the algorithm in <xref ref-type="fig" rid="fig7">Figure 7</xref>. The DC-chopper braking circuit and the current limiting technique operate in parallel. However, the DC chopper circuit leads to absorb the excessive energy. Each LVRT control technique is described in the sections below.</p><sec id="s4_1"><title>4.1. DC Braking Chopper for Excessive DC Voltage Protection</title><p>During a fault caused voltage dip, the voltage of dc-link (V<sub>dc</sub>) increases momentarily due to sudden drop in active power supplied by the PV system [<xref ref-type="bibr" rid="scirp.90036-ref18">18</xref>]. This will lead to rapid increase in power output of PV system, which may cause damage or disconnect the PV inverter. To overcome this problem, the use of a dc-chopper braking circuit is proposed in this study. The DC-link braking chopper circuit as shown in <xref ref-type="fig" rid="fig8">Figure 8</xref> is a simple protection scheme that operates by shorting the dc-link through a braking resistor when the dc-link voltage exceeds the threshold value (725 V) i.e. only when the fault is detected. The braking resistor is calculated according to (15)</p><p>P b r a k e = V d c 2 R b r a k e (15)</p><p>An anti-parallel diode may be connected across the brake resistor to allow for the stray inductance effects when the chopper IGBT is switched off. During normal operation, the switch is open and closes when an over voltage is detected [<xref ref-type="bibr" rid="scirp.90036-ref19">19</xref>].</p></sec><sec id="s4_2"><title>4.2. Reactive Current Injection</title><p>In order for the PV system to perform LVRT function during fault caused voltage dips, it has to inject an appropriate reactive current for the particular voltage drop. Post fault the reactive current injection has to be continued for a certain period of time depending on the grid code requirements. According to <xref ref-type="fig" rid="fig9">Figure 9</xref>, depicted from the German grid code [<xref ref-type="bibr" rid="scirp.90036-ref6">6</xref>] [<xref ref-type="bibr" rid="scirp.90036-ref20">20</xref>] , when the amplitude of grid voltage is between 0.9 p.u and 1.1 p.u, the system is in normal operation and the inverter inject only active current. On the other hand, when the amplitude of grid voltage drops below 0.9 p.u, the inverter control must be switched to LVRT control. Equation (16) shows the piecewise ratio of injected reactive current to the nominal current (i<sub>qn</sub>) depending on the level of voltage dip [<xref ref-type="bibr" rid="scirp.90036-ref8">8</xref>].</p><p>i q n = { 0                           case   a : V g &gt; 0.9 V g n 2 − 2 V g V g n       case   b : 0.9 V g n ≥ V g ≥ 0.5 V g n 1                             case   c : V g ≤ 0.5 V g n (16)</p><p>where V<sub>g</sub> and V<sub>gn</sub> are the amplitude values of the grid voltages during the fault and the normal conditions, respectively. During voltage dip, the inverter should inject the specified reactive power to help voltage recovery based on the LVRT requirements.</p></sec><sec id="s4_3"><title>4.3. Active Current Limiting</title><p>Whenever the maximum current rating of PV inverters is exceeded, i.e. the AC current exceeds the operating AC current range and the inverter disconnects from the grid. This is a result of the increased d-components of current in the SRF during grid faults. This increase is because the controller is trying to maintain grid voltage constant and while reducing the injected active power into the grid during fault caused voltage dips. In this case, the q-components of current increase in the SRF increase for the inverter to inject reactive current in order to meet the LVRT requirements [<xref ref-type="bibr" rid="scirp.90036-ref15">15</xref>]. Due to the increase in the d and q components, the inverter may get disconnected from the grid by over current protection schemes. In order to overcome this issue, the active current (d-component) is limited to within the required limits. Subsequently, the d-component current is a function of the reactive current injected during the fault and the maximum current rating of the inverter as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>0. Equation (17), shows the calculation applied for limiting current during grid fault occurrence.</p><p>i d n * = ( 1 − i q n 2 ) ∗ I n (17)</p><p>where i d n * is d-component of the AC current during fault occurrence and In is the nominal maximum operating current of the inverter, 400 A for the system under study.</p><p>During operating conditions, both active and reactive current should not exceed 1.1 times of the nominal current operating value of the inverter, as derived from the equation below [<xref ref-type="bibr" rid="scirp.90036-ref21">21</xref>].</p><p>( i d 2 + i q 2 ) ≤ 1.1 I n (18)</p><p>Finally, the allowed active power and injected reactive power during faulty condition can be calculated by:</p><p>P = 3 2 ( V d i d n ∗ ) and Q = 3 2 ( V q i q n ∗ ) (19)</p></sec></sec><sec id="s5"><title>5. Verification and Simulation Results</title><p>For verification of the effectiveness of the proposed LVRT strategy, dynamic assessment has been performed considering voltage dips caused by both symmetrical and unsymmetrical fault conditions i.e. three phase symmetrical fault (L-L-L) and the single-phase to ground fault (L-G). The instantaneous values of current and voltage are measured at the point of common coupling. Simulation results are displayed in the section below with results within the operating ranges to meet the grid code requirements. The simulations have been carried out at standard test condition (STC) i.e. irradiation, G, is 1000 W/m<sup>2</sup> and the temperature, T, is 25˚C.</p><p>A three-phase fault (worst-case scenario) with 85% voltage dip is applied along the 15 kV MV line for 0.15 seconds duration (0.45 to 0.6 s). <xref ref-type="fig" rid="fig1">Figure 1</xref>1 and <xref ref-type="fig" rid="fig1">Figure 1</xref>2 show the results without and with the LVRT control strategy on the DC side. It is noted in Figures 12(a)-(c) that all magnitudes keep within</p><p>accepted operating range of the pre-fault values after the fault clearance as opposed to Figures 11(a)-(c) where the value of the DC-link voltage, PV array current and power take a long time to settle to the pre-fault value during fault clearance. This verifies the effectiveness of LVRT in avoiding the excessive DC-link voltage and its associated effects.</p><p>In the occurrence of fault, grid code standards require injection of 100% reactive current into the grid as depicted in <xref ref-type="fig" rid="fig1">Figure 1</xref>3(d) &amp; <xref ref-type="fig" rid="fig1">Figure 1</xref>3(e). This allows the inverter to stay connected and support grid voltage and current recovery as presented in Figures 13(a)-(c).</p><p>For the effective study of the current limiting contribution in the proposed LVRT control strategy, a single to ground fault was applied on the 15 kV distribution line for a duration of 0.15 seconds. <xref ref-type="fig" rid="fig1">Figure 1</xref>4 and <xref ref-type="fig" rid="fig1">Figure 1</xref>5 show the response results without and with the LVRT control strategy on the AC side respectively. It is observed in <xref ref-type="fig" rid="fig1">Figure 1</xref>4(b) that the output current exceeds the maximum acceptable current since it greater than the rated current by almost 40%. With the application of the proposed control capability, the output of the limiter will be restricted based on the need for reactive current injection as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>5(c). This helps to maintain the grid currents balanced within acceptable operating values i.e. the grid current as measured from the PCC is not greater 1.1 times the nominal inverter current (1.1I<sub>n</sub>). This is properly illustrated in <xref ref-type="fig" rid="fig1">Figure 1</xref>5(b) as opposed to <xref ref-type="fig" rid="fig1">Figure 1</xref>4(b).</p></sec><sec id="s6"><title>6. Conclusion</title><p>In modern power systems, the GCPSs are designed with the capability to ride through low voltages for grid support. This paper focused on the study of the effectiveness of the combination of the DC chopper and the current limiting technique based on the required reactive current. Simulation results with application of 85% and 30% fault caused voltage dips have displayed the effectiveness with fast switching during grid fault operation to suppress the excessive increase of DC voltage, AC current and the excessive energy. In doing so, the inverter remains connected to the system. In conclusion, the proposed control scheme can maximize the voltage support capability of PV plant as well as taking the safety of equipment into consideration.</p></sec><sec id="s7"><title>Conflicts of Interest</title><p>The authors declare no conflicts of interest regarding the publication of this paper.</p></sec><sec id="s8"><title>Cite this paper</title><p>Ntare, R., Abbasy, N.H. and Youssef, K.H.M. (2019) Low Voltage Ride through Control Capability of a Large Grid Connected PV System Combining DC Chopper and Current Limiting Techniques. Journal of Power and Energy Engineering, 7, 62-79. https://doi.org/10.4236/jpee.2019.71004</p></sec><sec id="s9"><title>Nomenclature</title><p>V<sub>n</sub> Nominal voltage</p><p>DC Direct current</p><p>AC Alternating current</p><p>MW Mega Watt</p><p>kV Kilovolt</p><p>VA Volt-ampere</p><p>V<sub>dc</sub> DC link voltage</p><p>I<sub>pv</sub> PV array current</p><p>V<sub>pv</sub> PV array voltage</p><p>V<sub>g</sub> Grid voltage at the point of common coupling</p><p>I<sub>g</sub> Grid current at the point of common coupling</p><p>L<sub>f</sub> Inductance of the harmonic filter</p><p>C<sub>f</sub> Capacitance of the harmonic filter</p><p>R<sub>d</sub> Damping resistor</p><p>I<sub>L</sub> Load voltage</p><p>V<sub>L</sub> Load voltage</p><p>Thd Threshold</p><p>p.u Per unit representation</p><p>IGBT Insulated gate bipolar transistor</p></sec></body><back><ref-list><title>References</title><ref id="scirp.90036-ref1"><label>1</label><mixed-citation publication-type="other" xlink:type="simple">Al-Shetwi, A.Q. and Sujod, M.Z. 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