Consider the circuit shown in Figure 1(a) where the simplest possible attenuator (potential divider) shown in dashed line box. Its Thevenin voltage

V 1 = R 2 R 2 + R 1 + R V = a V (1)

where

a = R 2 R 2 + R 1 + R (2)

is the AF. Thevenin resistance R_T1 as seen from 1-1’ in Figure 1(a) can be made equal to R, first increasing R by a series resistance R₁ and then restoring it by connecting a parallel resistance R₂. Thus the condition is

R T 1 = R 2 ( R 1 + R ) R 2 + R 1 + R = R . (3)

Solving for R₁, we get

R 1 = ( 1 − a a ) R = ( r − 1 ) R . (4)

From (2) and (4), we get

R 2 = ( 1 1 − a ) R = ( r r − 1 ) R . (5)

After substituting the values of R₁ and R₂ in circuit of Figure 1(a), we get the circuit shown in Figure 1(b). To avoid the fractional value of R₂, we scale up all the resistance values by a factor (r − 1). Scaled circuit is shown in Figure 2(a).

Note that, if a voltage V is applied in series with rR instead of (r − 1)R, as shown in Figure 2(a), Thevenin voltage will be [ ( r − 1 ) / r ] V with the same Thevenin resistance R_T1.

Out of the three resistance values (r − 1), r and (r − 1)² in Figure 2 the minimum value is r − 1, and the maximum value is (r − 1)² as long as (r − 1)² ≥ r, i.e., when r ≥ 2.6 and ≤ 0.36. For integer values of r, r ≥ 3 as r cannot be negative.

Spread

S = R max R min = { ( r − 1 ) 2 r − 1 = r − 1 ,     r ≥ 3 r r − 1 ,   r = 2 . (6)

Note that the spread is 2 for both r = 2 and 3.

If one more section is cascaded as shown in Figure 3(a), it can easily be seen that Thevenin voltage is

V 2 = R 2 R 2 + R 1 + R a V = a 2 V (7)

and Thevenin resistance is still R. The Thevenin equivalent is shown in Figure 3(b).

Thus if N number of sections are connected in cascade as shown in Figure 4(a), then Thevenin voltage will be

V n = a N V (8)

and the Thevenin resistance will be R. The equivalent circuit is shown in Figure 4(b).

As an application of the above theory, Figure 5 shows a circuit which has 3 attenuators in cascade with r = 2, 3, 4.

It may be noted that the Thevenin voltage and the node voltage are the same as long as attenuator is not loaded. Hence in a chain of cascaded attenuator only the last one will have this property; all others do change their node voltages. This aspect is further discussed in section on practical results. Note that the spread, from Equation (6), is 2.25; while this would have been 23 if a single attenuator with a = 1/24 were used.

Let us consider the circuit of Figure 4 with voltage sources connected as shown in Figure 6(a). After replacing the portion of the circuit left to 11’ by Thevenin equivalent the circuit becomes as shown in Figure 6(b) where

V T 1 = r − 1 r V o . (9)

Repeating the similar step across the terminals 22’ and using superposition theorem, the circuit reduces to that shown in Figure 6(c) where

V T 2 = r − 1 r 2 V o + r − 1 r V 1 = r − 1 r 2 [ V o + r V 1 ] . (10)

Repeating the same across terminals 33’, the circuit reduces to that shown in Figure 6(d).

V T 3 = r − 1 r 3 V o + r − 1 r 2 V 1 + r − 1 r V 2 = ( r − 1 ) r 3 [ V o + r V 1 + r 2 V 2 ] . (11)

Proceeding in this manner, we can write for the entire circuit of Figure 4(a),

V o u t = r − 1 r N ∑ k = 0 N − 1 r k V k . (12)

Now we modify the circuit as shown in Figure 7 where switches S_k (k = 1, N − 1) are inserted which are operated by digital input. Depending upon the bit value, the particular switch connects to different weighted voltages according to the radix r. Thus the output voltage is proportional to the analog value of the digital input.

The resistance values in Figure 7 are the same for r = 2 as given in [17] [18] , for r = 3 given in [8] after scaling by a factor 2/3, and for r = 4 given in [9] .

A resistance of value (r − 1) is connected across terminals NN’ so as to make the ladder symmetrical. This is shown in Figure 8(a). This will, however, reduce the voltage to

V ′ o u t = r r + 1 V o u t . (13)

This DAC, if connected to some circuit, will be further loaded. To avoid this loading, one can connect a non-inverting amplifier at the output as shown in Figure 8(b). This will have an extra advantage of adjusting the gain to any desired value by choosing R_f. However, one resistance can be reduced, if an inverting amplifier is used, as shown in Figure 8(c), wherein the resistance of r(r − 1) is connected to virtual ground instead of actual ground. Again the desired gain can be adjusted by choosing proper value for R_f. If a positive output is required, then the polarity of all the weighted reference voltages can be changed to negative.