<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">OALibJ</journal-id><journal-title-group><journal-title>Open Access Library Journal</journal-title></journal-title-group><issn pub-type="epub">2333-9705</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/oalib.1102821</article-id><article-id pub-id-type="publisher-id">OALibJ-69550</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Biomedical&amp;Life Sciences</subject><subject> Business&amp;Economics</subject><subject> Chemistry&amp;Materials Science</subject><subject> Computer Science&amp;Communications</subject><subject> Earth&amp;Environmental Sciences</subject><subject> Engineering</subject><subject> Medicine&amp;Healthcare</subject><subject> Physics&amp;Mathematics</subject><subject> Social Sciences&amp;Humanities</subject></subj-group></article-categories><title-group><article-title>
 
 
  Ringing and Voltage Overshoot Analysis of a Proposed DC/AC Converter
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Gierri</surname><given-names>Waltrich</given-names></name><xref ref-type="aff" rid="aff1"><sub>1</sub></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib></contrib-group><aff id="aff1"><label>1</label><addr-line>Federal University of Santa Catarina, Joinville, Brazil</addr-line></aff><author-notes><corresp id="cor1">* E-mail:<email>gierriw@yahoo.com.br</email></corresp></author-notes><pub-date pub-type="epub"><day>31</day><month>07</month><year>2016</year></pub-date><volume>03</volume><issue>07</issue><fpage>1</fpage><lpage>9</lpage><history><date date-type="received"><day>15</day>	<month>June</month>	<year>2016</year></date><date date-type="rev-recd"><day>accepted</day>	<month>19</month>	<year>July</year>	</date><date date-type="accepted"><day>26</day>	<month>July</month>	<year>2016</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
   
   This research presents a study of the ringing and voltage overshoot analysis of a proposed DC/AC converter. This overvoltage is generated due to the resonance between three passive components: transformer leakage inductances, switch capacitances, and wiring resistances. By applying simple RLC circuit equations, it proves possible to determine the analytic equations and reproduce the voltage across the switche
   s to predict the overvoltage and resonance frequency. The circuit is built and tested experimentally to validate the theoretical concept. 
  
 
</p></abstract><kwd-group><kwd>Bidirectional</kwd><kwd> Back-to-Back Converter</kwd><kwd> DC/AC Converter</kwd><kwd> DC-Link Capacitor</kwd><kwd> Matrix Converter</kwd><kwd> Three-Phase</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>In this paper the current and voltage ringing of the DC/AC converter, proposed by the author in [<xref ref-type="bibr" rid="scirp.69550-ref1">1</xref>] , is analyzed.</p><p>It is convenient to use the circuit shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>, which describes an alternating current with a small triangular ripple through an RL load.</p><p>The circuit can be seen as a conventional voltage source inverter when v<sub>SA</sub> is positive and not zero and when S<sub>B</sub><sub>18</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>22</sub>, and S<sub>B</sub><sub>24</sub> are switched on. On the other hand, when switches S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>19</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>23</sub> are switched on and v<sub>SA</sub> is negative and not zero, it can also be seen as a conventional inverter. Therefore, it can be modulated as a conventional inverter in each half period. This converter is similar to a high frequency link DC/AC converter [<xref ref-type="bibr" rid="scirp.69550-ref2">2</xref>] - [<xref ref-type="bibr" rid="scirp.69550-ref4">4</xref>] .</p><p>To carry out the ringing analysis a parasitic capacitor is placed in parallel with each switch, as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>, to take into account the higher-frequency oscillations in the converter. The IGBT internal capacitance value was obtained from the manufacturer’s data sheet [<xref ref-type="bibr" rid="scirp.69550-ref5">5</xref>] .</p><fig id="fig1"  position="float"><label><xref ref-type="fig" rid="fig1">Figure 1</xref></label><caption><title> Path of the oscillating current during the first half-period; (a) first, (b) second, and (c) third oscillation loops</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x6.png"/></fig><p>The circuit in <xref ref-type="fig" rid="fig1">Figure 1</xref> is simulated using the PSIM software, and the results are given in <xref ref-type="fig" rid="fig2">Figure 2</xref>. The converter is built and tested and experimental results will be presented in the final version of this paper.</p></sec><sec id="s2"><title>2. Ringing and Voltage Overshoot Model</title><p>As shown in <xref ref-type="fig" rid="fig2">Figure 2</xref>, there are three different oscillations in v<sub>SA</sub> during the first half-period, which are also repeated in the second half-period. Each oscillation has a different path, and the three paths are highlighted in <xref ref-type="fig" rid="fig1">Figure 1</xref> [<xref ref-type="bibr" rid="scirp.69550-ref6">6</xref>] [<xref ref-type="bibr" rid="scirp.69550-ref7">7</xref>] .</p><p>The first oscillation type appears when v<sub>SA</sub> changes from −U<sub>SB</sub> to +U<sub>SB</sub>. <xref ref-type="fig" rid="fig1">Figure 1</xref>(a) shows the current loop in this case. In this mode, the load current i<sub>LS</sub> (shown in <xref ref-type="fig" rid="fig2">Figure 2</xref>) is flowing through the upper switches (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>18</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>22</sub>); therefore, there is no current through the transformer. The resulting circuit loop consists of resistors, inductances, and capacitors, where the oscillating current passes through the capacitors in parallel with the switches S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>23</sub>. Since the upper switches are conducting the load current, the voltages across S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>23</sub> are the same. Because the capacitor C<sub>SB</sub> has a high value, its internal resistance R<sub>CSB</sub> is quite low (2 mΩ); thus, the SB port can also be seen as a short circuit at high frequencies.</p><p>In order to predict the behavior of the voltage across the snubber capacitors in parallel with S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>23</sub> a formulation is developed in the following. To carry out the calculations, the well-known relationship for a RLC network is applied.</p><fig id="fig2"  position="float"><label><xref ref-type="fig" rid="fig2">Figure 2</xref></label><caption><title> Simulation results for the circuit shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>. In graph (a), the labels 1, 2, and 3 represent the first, second, and third oscillation modes, respectively</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x7.png"/></fig><p>The oscillation frequency of a weakly-damped parallel resonant RLC network is known to be</p><disp-formula id="scirp.69550-formula471"><label>(1)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x8.png"  xlink:type="simple"/></disp-formula><p>Using the parameters from [<xref ref-type="bibr" rid="scirp.69550-ref8">8</xref>] , (1) results in a frequency of 3.3 MHz. The wiring and transformer resistances are considerably larger at such a high frequency than at 10 kHz. The primary and secondary resistances of each winding of the transformer were measured at 3.3 MHz and it was found to be equal to 1.9 Ω. The cables of the prototype were also measured at this frequency. Each meter of cable presents 300 mΩ resistance. Because the complete prototype is expected to use around 2 meters of cable (see prototype in [<xref ref-type="bibr" rid="scirp.69550-ref8">8</xref>] ), an extra 600 mΩ must be added. Therefore, a total resistance of 4.4 Ω was inserted in series with the IGBT parasitic capacitors to study the voltage overshoot in the simulated circuit.</p><p>Using the parameters shown in [<xref ref-type="bibr" rid="scirp.69550-ref8">8</xref>] , the damping factor can be calculated as [<xref ref-type="bibr" rid="scirp.69550-ref9">9</xref>]</p><disp-formula id="scirp.69550-formula472"><label>(2)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x9.png"  xlink:type="simple"/></disp-formula><p>resulting in ζ = 0.05. A system with a damping factor lower than unity is expected to be underdamped.</p><p>The general expression for the capacitor voltage in a RLC network [<xref ref-type="bibr" rid="scirp.69550-ref10">10</xref>] [<xref ref-type="bibr" rid="scirp.69550-ref11">11</xref>] is given by</p><disp-formula id="scirp.69550-formula473"><label>(3)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x10.png"  xlink:type="simple"/></disp-formula><p>where v<sub>f</sub> is the DC voltage component, and s<sub>1</sub> and s<sub>2</sub> are, respectively,</p><disp-formula id="scirp.69550-formula474"><label>(4)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x11.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.69550-formula475"><label>(5)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x12.png"  xlink:type="simple"/></disp-formula><p>The coefficients A<sub>1</sub> and A<sub>2</sub> are determined by the boundary conditions. For the specific situation in <xref ref-type="fig" rid="fig1">Figure 1</xref>(a), A<sub>1</sub> and A<sub>2</sub> are given by, respectively,</p><disp-formula id="scirp.69550-formula476"><label>(6)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x13.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.69550-formula477"><label>(7)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x14.png"  xlink:type="simple"/></disp-formula><p>where C is the equivalent capacitance of C<sub>SB</sub><sub>19</sub> and C<sub>SB</sub><sub>23</sub> in parallel, i<sub>PA</sub> is the initial current through the transformer leakage inductance, and v<sub>oC</sub> is the initial voltage across the capacitor C.</p><p>For the first oscillation mode, the initial current through the transformer leakage inductance and the initial voltage across C<sub>SB</sub><sub>19</sub> and C<sub>SB</sub><sub>23</sub> are both zero. Under these initial conditions, the voltage waveform across the switches S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>23</sub> is determined by (3). The results were plotted with MATLAB software and they are similar to the simulation outcome from the PSIM software, which is shown in the <xref ref-type="fig" rid="fig3">Figure 3</xref>.</p><p>Independent of the current value that circulates through the load, the voltage waveform across the switches S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>23</sub> never changes in the first oscillation mode because the initial conditions are always the same. The resonant frequency of the circuit was calculated and confirmed by simulation to be 3.3 MHz.</p><p>The second oscillation mode in <xref ref-type="fig" rid="fig2">Figure 2</xref>(a) occurs when the power source U<sub>SB</sub> starts sending energy to the load, as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>(b). At that moment, the voltage across the switch S<sub>B</sub><sub>19</sub> is clamped with the load voltage (v<sub>SG</sub>). The voltage v<sub>SG</sub> can be calculated because the current through the load at this moment is known. Therefore, the initial conditions in this case are the voltage value of v<sub>SG</sub> (at that specific moment) and zero current through the transformer leakage inductance. Using these quantities and (3), a theoretical voltage waveform across S<sub>B</sub><sub>19</sub> for the second oscillation mode can be determined. The voltage waveforms across S<sub>B</sub><sub>19</sub> and S<sub>B</sub><sub>21</sub> are the same in this case.</p><p>The third oscillation mode starts when the power source U<sub>SB</sub> stops sending energy to the load, as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>(c). At this moment, the current through the leakage inductances (L<sub>PA</sub> and L<sub>SA</sub>) are equal to the load current i<sub>LS</sub>, the voltage across S<sub>B</sub><sub>21</sub> is equal to U<sub>SB</sub>, and the voltage across S<sub>B</sub><sub>17</sub> is zero. Thus, the currents coming from the leakage inductances and from the capacitor in parallel with S<sub>B</sub><sub>21</sub> start charging the capacitor in parallel with S<sub>B</sub><sub>17</sub>. When the voltages across S<sub>B</sub><sub>21</sub> and S<sub>B</sub><sub>17</sub> reach the same value, oscillation starts. Under these initial conditions, the theoretical voltage waveform across the switches S<sub>B</sub><sub>17</sub> and S<sub>B</sub><sub>21</sub> can be calculated. When the load current is negative, the same overvoltage is generated across the switches S<sub>B</sub><sub>20</sub> and S<sub>B</sub><sub>24</sub>. As such, the highest overvoltage will always occur on the outer switches S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>, as shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>.</p><p>The three oscillation modes can be summarized as follows. Once the equivalent RLC circuit parameters are determined, the first oscillation mode is dependent on the voltage U<sub>SB</sub>, the second oscillation mode is imposed by the load current i<sub>LS</sub> and voltage v<sub>SG</sub>, and the third oscillation mode is based on i<sub>LS</sub> and U<sub>SB</sub>. For the parameters shown in <xref ref-type="table" rid="table1">Table 1</xref> and i<sub>LS</sub> = 40 A, the maximum overvoltage is approximately 1500 V, as shown in <xref ref-type="fig" rid="fig2">Figure 2</xref>(c).</p><p>Consequently, with the method described in this section it is possible to determine the maximum peak voltage across the matrix converter switches for the maximum load current (i<sub>LS</sub> = 40 A). The results in <xref ref-type="fig" rid="fig2">Figure 2</xref> show a peak voltage of approximately 1500 V over the outer switches (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>). The outer switches have the most stress because they are switched off when the load current is at its highest value. Thus, snubber capacitors should be connected in parallel with these switches. The design of these snubber capacitors is described in the following section. The inner switches (S<sub>B</sub><sub>18</sub>, S<sub>B</sub><sub>19</sub>, S<sub>B</sub><sub>22</sub>, and S<sub>B</sub><sub>23</sub>) do not need snubber capacitors</p><fig id="fig3"  position="float"><label><xref ref-type="fig" rid="fig3">Figure 3</xref></label><caption><title> Voltage across the matrix converter switches, determined on the basis of theoretical analysis. Results for the (a) first, (b) second, and (c) third oscillation paths are shown</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x15.png"/></fig><table-wrap id="table1" ><label><xref ref-type="table" rid="table1">Table 1</xref></label><caption><title> Parameters for voltage overshoot analysis</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Parameter</th><th align="center" valign="middle" >Value</th></tr></thead><tr><td align="center" valign="middle" >Leakage inductance of the primary and secondary winding</td><td align="center" valign="middle" >1 μH</td></tr><tr><td align="center" valign="middle" >Resistance of the primary and secondary winding at 3.3 MHz</td><td align="center" valign="middle" >1.9 Ω</td></tr><tr><td align="center" valign="middle" >Total cable resistance at 3.3 MHz</td><td align="center" valign="middle" >600 mΩ</td></tr><tr><td align="center" valign="middle" >Transformer turn ratio</td><td align="center" valign="middle" >1</td></tr><tr><td align="center" valign="middle" >Capacitor in parallel with each matrix converter switch</td><td align="center" valign="middle" >580 pF</td></tr><tr><td align="center" valign="middle" >Resistance in parallel with each matrix converter switch</td><td align="center" valign="middle" >2.5 Ω</td></tr><tr><td align="center" valign="middle" >Switching frequency</td><td align="center" valign="middle" >10 kHz</td></tr><tr><td align="center" valign="middle" >Load resistance</td><td align="center" valign="middle" >10 Ω</td></tr><tr><td align="center" valign="middle" >Load inductance</td><td align="center" valign="middle" >2 mH</td></tr><tr><td align="center" valign="middle" >Capacitor at SB port (C<sub>SB</sub>)</td><td align="center" valign="middle" >820 μF</td></tr><tr><td align="center" valign="middle" >Voltage at SB port (U<sub>SB</sub>)</td><td align="center" valign="middle" >400 V</td></tr></tbody></table></table-wrap><p>because in the worst conditions (i<sub>LS</sub> = 40 A) the voltage across the switches is lower than 800 V, as can be seen in <xref ref-type="fig" rid="fig2">Figure 2</xref>.</p><p>To reduce the overvoltage across the matrix converter switches, snubber capacitors can be placed in parallel with the switches.</p></sec><sec id="s3"><title>3. Snubber Design</title><p>The proposed DC/AC converter requires snubber capacitors to limit the overvoltage across the outer switches (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>). The snubber capacitors are placed in parallel with the IGBTs to absorb the energy accumulated in the stray inductances, present in the transformer and cables of the circuit shown in <xref ref-type="fig" rid="fig1">Figure 1</xref> [<xref ref-type="bibr" rid="scirp.69550-ref12">12</xref>] . The objective of a snubber capacitor is to reduce voltage ringings that occur when a switch is switched off, by providing an alternative path for the current flowing through stray inductances. The energy accumulated in stray inductances can be eventually dissipated directly in the switches in conduction, or in an external resistor placed in series with a snubber capacitor. The snubber design will be presented only in the final version of the paper due to the lack of space, but it results in a snubber capacitor value of 22 nF. The simulation results using these snubbers are presented in <xref ref-type="fig" rid="fig2">Figure 2</xref>.</p><p>For the AC/AC converter proposed in this chapter, the energy from the leakage inductances (shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>) is dissipated directly in the IGBTs and the parasitic resistances.</p><p>The power dissipated in the IGBTs due to the snubber capacitors is determined by [<xref ref-type="bibr" rid="scirp.69550-ref13">13</xref>] - [<xref ref-type="bibr" rid="scirp.69550-ref15">15</xref>]</p><disp-formula id="scirp.69550-formula478"><label>(8)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/69550x16.png"  xlink:type="simple"/></disp-formula><p>where C<sub>sn</sub> is a snubber capacitor value, f<sub>s</sub> the switching frequency, and V<sub>sn</sub> is the voltage across C<sub>sn</sub> just before the switch is switched on. The value of C<sub>sn</sub> can be determined using (3), to guarantee that the overvoltage across the outer switches will not be higher than a desired maximum value.</p><p>In the implemented converter (<xref ref-type="fig" rid="fig1">Figure 1</xref>) a total leakage inductance of 2 μH was measured, resulnting a peak voltage of 1500 V (see <xref ref-type="fig" rid="fig2">Figure 2</xref>) when the maximum load current (i<sub>LS</sub>) is 40 A. The goal is to reduce the peak voltage to 800 V to allow the use of IGBTs which can support a maximum voltage of 1000 V. Therefore, using (3) is possible to determine the peak voltage across the outer switches for different values of C<sub>sn</sub>. However, when a different capacitor is placed in parallel with the IGBTs, the ringing frequency changes and, consequently, the resistance of the transformer and cables of the prototypes also change (see <xref ref-type="fig" rid="fig4">Figure 4</xref>). Therefore, in order to</p><fig id="fig4"  position="float"><label><xref ref-type="fig" rid="fig4">Figure 4</xref></label><caption><title> Measured resistances by an impedance analyzer (Agilent 4294A) of (a) the primary (R<sub>PA</sub>) and secondary (R<sub>SA</sub>) transformer windings, (b) the connection cable used in the prototype, and (c) the primary and secondary leakage inductances of the transformer shown in <xref ref-type="fig" rid="fig1">Figure 1</xref></title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x17.png"/></fig><fig id="fig5"  position="float"><label><xref ref-type="fig" rid="fig5">Figure 5</xref></label><caption><title> Overvoltage across S<sub>B</sub><sub>17</sub> for different snubber capacitor values</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x18.png"/></fig><fig id="fig6"  position="float"><label><xref ref-type="fig" rid="fig6">Figure 6</xref></label><caption><title> Simulation results for the proposed matrix converter using snubber capacitors (22 nF) across the outer switches (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>)</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x19.png"/></fig><fig id="fig7"  position="float"><label><xref ref-type="fig" rid="fig7">Figure 7</xref></label><caption><title> Setup to test the circuit shown in <xref ref-type="fig" rid="fig1">Figure 1</xref></title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/69550x20.png"/></fig><p>facilitate the choice of the snubbers, for different values of C<sub>sn</sub>, the corresponding transformer and cable resistances were obtained from the oscillation frequencies as given by (1) and the impedance characteristics in <xref ref-type="fig" rid="fig4">Figure 4</xref>. Then, the resulting voltage ringing is plotted using (3), as shown in <xref ref-type="fig" rid="fig5">Figure 5</xref>. According to <xref ref-type="fig" rid="fig5">Figure 5</xref>, with snubber capacitors between 15 nF to 22.5 nF, the voltage across S<sub>B</sub><sub>17</sub> has a peak value lower than 800 V. For safety margin reasons a capacitor of 22 nF was implemented. The proposed AC/AC converter was simulated again with the chosen snubber connected in parallel to each outer switch (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>) and the results are shown in <xref ref-type="fig" rid="fig6">Figure 6</xref>. This figure confirms a maximum voltage across S<sub>B</sub><sub>17</sub> of 650 V and ringing frequency of 759 kHz. The inner switches (S<sub>B</sub><sub>18</sub>, S<sub>B</sub><sub>19</sub>, S<sub>B</sub><sub>22</sub>, and S<sub>B</sub><sub>23</sub>) also have overvoltage lower than 800 V, as requested.</p><p>The extra power losses in the switches can be calculated with (8), resulting a dissipation of 17.6 W per switch. Because snubber capacitors are placed only across the outer switches (S<sub>B</sub><sub>17</sub>, S<sub>B</sub><sub>20</sub>, S<sub>B</sub><sub>21</sub>, and S<sub>B</sub><sub>24</sub>), and the proposed converter has 12 switches. As a result, the total snubber loss is 211.2 W. When these losses are added to the total losses, the efficiency of the proposed AC/AC converter reduces to 93.2%.</p><p>The converter was experimentally tested to validate the theoretical <xref ref-type="fig" rid="fig7">Figure 7</xref>.</p></sec><sec id="s4"><title>4. Conclusion</title><p>The ringing and overvoltage across the switches of the proposed DC/AC converter is described. This overvoltage is generated due to the resonance between three passive components: transformer leakage inductances, switch capacitances, and wiring resistances. By applying simple RLC circuit equations, it proves possible to determine the analytic equations and reproduce the voltage across the switches to predict the overvoltage and resonance frequency. The analysis shows that the switches connected directly to the high-frequency transformer encounter higher voltage spikes compared to those connected directly to the load. Snubber capacitors are designed to decrease the peak voltage based on the theory developed in this paper.</p></sec><sec id="s5"><title>Cite this paper</title><p>Gierri Waltrich, (2016) Ringing and Voltage Overshoot Analysis of a Proposed DC/AC Converter. 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