The increase in use of computers increases the use of digital signal processing (DSP). In DSP, three domains are used to represent the signals. They are time domain/spatial domain (for one-dimensional signals for multidimensional signals respectively), frequency domain, and wavelet domains. Signal can be represented in any one of the domain which represents the essential characteristics of the signal. Frequency domain also called spectrum- or spectral analysis makes partitioning of spectral components to propose a small and meaningful form of signal representation. There are many frequency domain transformations. Due to its strong “energy compaction” property DCT is frequently used in signal and image processing. It is also used in a multitude of compression standards. For multimedia applications, video processing systems such as High Efficiency Video Coding (HEVC) need fast and compact blocks. Approximation of DCT transform becomes efficient by the vast improvement in fast algorithms.

A Discrete Cosine Transform (DCT) [1] gives a finite number of points in terms of addition of cosine functions oscillating at different frequencies. Discrete Fourier transforms (DFT) using only real numbers becomes DCT, a Fourier-related transform.

DCT can be expressed as

where

1D-DCT is utilized for changing one dimensional signal like audio. But image and video signal needs 2D-DCT for its handling. Number of uses requiring higher dimensional DCT calculations are increasing. So much importance is given for the algorithm which can be extended for higher dimensional readily.

The individual product of all dimensions of 1D-DCT is used to produce multidimensional DCT. For example, the product of 1D-DCT along the rows and columns form the 2D-DCT of an image. The computation of 2D-DCT from 1D-DCTs across all dimension is known as a row-column algorithm.

The expression for 2D-DCT is given by

where

In conventional DCT, an 8-point 1D- DCT requires 64 multiplications and 56 additions and 8-point 2D-DCT requires 1024 multiplications and 896 additions. It is computation intensive and also occupies more area. So the approximate DCTs are preferred. Humans are able to perceive and identify the information from slightly erroneous images. It is enough to produce approximate outputs rather than absolute outputs.

The idea of this paper is three-fold: First, reviewing architecture of approximate DCTs; Second, extending the architecture of 1D approximate DCT to 2D approximate DCT and third, proposes implementation of 2D approximate DCT in virtexE FPGA; The workflow is shown in Figure 1.

The idea of using the approximation algorithm for DCT is to eliminate computation intensive and power consuming operations like multiplications and also to get significant evaluation of DCT. It is more suitable for large DCTs to reduce the computations of DCT which increases randomly. The available methods are not suitable for extension. But sizes such as 16-point and 32-point DCTs are needed for many image processing applications like biomedical signal processing, satellite communication, etc.

Approximate DCT transforms have been proposed with no cost of multiplication gives better compression performance. Realization of the approximations in digital VLSI hardware requires only additions and subtractions which reduces chip area and power consumption than conventional DCTs transforms. The 8-point approximate DCT manipulation requires only addition and no multiplication. So computational complexity is brought down. A reconfigurable video standard like HEVC uses the best DCT approximation. The transformation matrix cost is equal to the number of arithmetic operations in its computation.

The number of reserved coefficients in the transform domain is the main constraint of image compression process. The performance of the DCT approximations is often a trade-off between accuracy and computational density of a given algorithm.

The reduced computational complexity, orthogonality, small error energy extendable of DCT is the main features of approximate DCT.

The diagonal matrix typically includes irrational numbers in the form, where m is a small positive integer. Normally, the irrational numbers in the diagonal matrix requires more computations. Since the elements of the matrix comprise only powers of two {0, ±1/2, ±1, ±2}, no multiplication is required.

The 2D approximate DCT architectures are prototyped on a FPGA for analysis and tested using on-chip hardware.

The architectures are designed for digital realization with verilog code using modelsim and Xilinx System with synthesis options. The proposed 2D approximate DCT architectures were physically realized on Xilinx VirtexE device. Comparison of hardware resource consumption and speed of architectures are analysed by implementing them in Xilinx VirtexE device. Table 2 gives the overall comparison analysis. For various approximate DCTs, the No. of slices occupied is shown in Figure 12, No. of Flip-flop required is shown in Figure 13, No. of LUTs needed is shown in Figure 14 and comparison of maximum frequency for different 2-D DCT is shown by Figure 15.

The approximate DCT by vaithyanathan et al. [8] reduces the computational complexity by 40.11% , 24.83%, 38.42%, 34.34%, 45.5% and 34.34% than Bouguezel et al. [2] , Bouguezel et al. [3] , Cintra and Bayer [4] , Modified Cintra and Bayer [5] , Potluri [6] and Potluri [7] respectively. It also increase the maximum frequency of operation by 24.7%, 23.5%, 12.36%, 10.51%, 13.29% and 4.91% than Bouguezel et al. [2] , Bouguezel et al. [3] , Cintra and Bayer [4] , Modified Cintra and Bayer [5] , Potluri [6] and Potluri [7] respectively.

From Table 2, it is evident that vaithyanathan et al. [8] transform requires less hardware resource and have highest frequency of operation than remaining approximations. The delay and computational complexity are reduced in this transform.

In this paper, we proposed 1) VLSI Architectures for Approximate 2D DCTs and 2) hardware implementation of proposed approximate 2D DCT transforms. All proposed approximate 2D DCT transforms perform well. However, Vaithyanathan et al. transform offers lower computational complexity and faster than all other transforms. In terms of image compression, the approximate transforms could outperform the conventional transforms. Hence the proposed transforms are the best approximation for the DCT in terms of computational complexity and speed. Introduced implementations address 2-D approximate DCTs. All the approximations were digitally simulated, prototyped and implemented using modelsim, VirtexE FPGA kit and Xilinx. The proposed architectures are suitable for image and video processing, being candidates for improvements in several standards including the HEVC. In future, the approximate versions for the 16-, 32- and 64-point DCT will be developed.

M. Thiruveni Raguraman,D. Shanthi Saravanan, (2016) FPGA Implementation of Approximate 2D Discrete Cosine Transforms. Circuits and Systems,07,434-445. doi: 10.4236/cs.2016.74037