<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">CS</journal-id><journal-title-group><journal-title>Circuits and Systems</journal-title></journal-title-group><issn pub-type="epub">2153-1285</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/cs.2016.74019</article-id><article-id pub-id-type="publisher-id">CS-65627</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Computer Science&amp;Communications</subject><subject> Engineering</subject><subject> Physics&amp;Mathematics</subject></subj-group></article-categories><title-group><article-title>
 
 
  A Bi-Polar Triple-Output Converter with Duty Cycle Estimation
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>umaraswami</surname><given-names>Sundararaman</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Mahadevan</surname><given-names>Gopalakrishnan</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib></contrib-group><aff id="aff1"><addr-line>Electrical &amp;amp; Electronics Engineering Department, Sri Venkateswara College of Engineering, Sriperumbudur, India</addr-line></aff><author-notes><corresp id="cor1">* E-mail:<email>sundararamank@svce.ac.in(US)</email>;</corresp></author-notes><pub-date pub-type="epub"><day>13</day><month>04</month><year>2016</year></pub-date><volume>07</volume><issue>04</issue><fpage>198</fpage><lpage>210</lpage><history><date date-type="received"><day>7</day>	<month>March</month>	<year>2016</year></date><date date-type="rev-recd"><day>accepted</day>	<month>16</month>	<year>April</year>	</date><date date-type="accepted"><day>19</day>	<month>April</month>	<year>2016</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
  This paper proposes a triple output converter with buck, boost and inverted outputs and controlled through duty cycle estimation. In the existing converter, to generate the negative output, the power flows from load to the supply (from the boost output to the supply) during a part of the cycle, which increases cycle time and losses, and reduces the power level. To overcome this, a modified converter with a main and an auxiliary inductance and with reduced number of switches is proposed. The converter can operate in continuous and discontinuous conduction modes and the outputs can be independently controlled. An analysis of the converter is done for both modes. A simplified control of the converter through duty cycle estimation is suggested to regulate the outputs, which does not have the constraint that the current ripple has to be small. The control works both in the continuous and discontinuous modes. The simulation results closely match with the analysis. A prototype of the converter is constructed with a Spartan FPGA system and results have been presented.
 
</p></abstract><kwd-group><kwd>Multi-Output</kwd><kwd> Dual Output</kwd><kwd> DC-DC Converter</kwd><kwd> Predictive Control</kwd><kwd> Bi-Polar</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>Multi-output DC-DC converters have become very popular recently and they are particularly used in many portable and handheld consumer applications. Portable devices use sub-modules which have different voltage requirements. Their small-size and light-weight make them very attractive and the cost is also optimized. Traditionally, isolated transformer-based multi-output DC-DC converters were widely employed to provide multiple output voltages. However, they are relatively bulky due to the presence of the reactive components. The single- inductor multi-output DC-DC converters were developed to effectively reduce the hardware required for providing multiple output voltages. The converters provide more than one output while requiring only one inductor and this helps in saving board space and reducing the overall cost. Multi-output converters apart from requiring buck and boost outputs also sometimes require a negative supply voltage as in an OLED display panel application. Hence it becomes necessary that the single converter supplies all the three types of voltages, step-down, step-up and a negative output simultaneously. Various such configurations have been discussed in literature [<xref ref-type="bibr" rid="scirp.65627-ref1">1</xref>] - [<xref ref-type="bibr" rid="scirp.65627-ref12">12</xref>] . Predictive control of DC-DC converters has been discussed in [<xref ref-type="bibr" rid="scirp.65627-ref13">13</xref>] - [<xref ref-type="bibr" rid="scirp.65627-ref16">16</xref>] . A Single-Inductor converter with all types, buck, boost and inverted outputs (SIBBI) has been proposed in [<xref ref-type="bibr" rid="scirp.65627-ref12">12</xref>] and is shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>.</p><p>The inductor is initially charged by making S<sub>0</sub> ON. When S<sub>0</sub> is opened, S<sub>1</sub> is closed and the inductor charges the boost output V<sub>1</sub>. The inductor current is allowed to become zero after which the boost output charges the inductor in the opposite direction through the body diode of the switch S<sub>1</sub> and through the supply. Thus power is returned back to the supply for the sake of charging the inductor in the reverse direction. When the switch S<sub>1</sub> is opened, S<sub>2</sub> is closed and the stored energy in the inductor is partly transferred to the negative output V<sub>2</sub>. When S<sub>2</sub> is opened, S<sub>3</sub> is closed and power is transferred to the buck output V<sub>3</sub> through the inductor L. This converter while providing all the three types of outputs has the problem that there is a reverse power flow from the load to the supply to generate the inverted output. This increases the ripple since the current has to pass through zero, twice in a cycle. The cycle time and losses are also increased.</p><p>The problems mentioned above are overcome in the proposed converter with reduced number of switches as shown in <xref ref-type="fig" rid="fig2">Figure 2</xref>. The converter is capable of generating buck, boost and inverted outputs simultaneously. The single inductor is split into two separate inductors L<sub>1</sub> and L<sub>2</sub> in the proposed converter. V<sub>1</sub> is the boost output, V<sub>2</sub> is the inverted output and V<sub>3</sub> is the buck output. C<sub>1</sub>, C<sub>2</sub>, and C<sub>3</sub> are the output filter capacitors to the outputs V<sub>1</sub>, V<sub>2</sub>, and V<sub>3</sub>, respectively, where R<sub>1</sub>, R<sub>2</sub> and R<sub>3</sub> are the corresponding loads. These three outputs are achieved by using two inductors (L<sub>1</sub>, L<sub>2</sub>) with three switches (S<sub>0</sub>, S<sub>1</sub> and S<sub>2</sub>). In the proposed configuration, the voltage levels of all three outputs can be adjusted by varying the duty cycles of switches S<sub>0</sub>, S<sub>1</sub>, and S<sub>2</sub>. S<sub>0</sub> is ON for the time dT<sub>s</sub>, S<sub>1</sub> is ON for the time d<sub>2</sub>T<sub>s</sub> and S<sub>2</sub> is ON for the time d<sub>1</sub>T<sub>s</sub> in every cycle where T<sub>s</sub> is the cycle time period. The inductor L<sub>1</sub> is charged through switch S<sub>0</sub> during dT<sub>s</sub> and simultaneously L<sub>2</sub> and the buck output is powered through switch S<sub>2</sub> for duration of d<sub>1</sub>T<sub>s</sub>. Once S<sub>0</sub> is turned OFF, D1 turns ON to drive the inverted output (V<sub>2</sub>) for the rest of the cycle if V<sub>2</sub> is operating in continuous conduction mode. When switch S<sub>2</sub> is turned off, S<sub>1</sub> is turned ON to store additional energy required by the boost output in the inductor for duration of d<sub>2</sub>T<sub>s</sub>. When S<sub>1</sub> is turned off, the stored energy in the inductor L<sub>2</sub> is transferred to the boost output V<sub>1</sub> through diode D<sub>3</sub> for the balance duration d<sub>3</sub>T<sub>s</sub>.</p><fig id="fig1"  position="float"><label><xref ref-type="fig" rid="fig1">Figure 1</xref></label><caption><title> Converter with buck, boost, inverted outputs</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x6.png"/></fig><fig id="fig2"  position="float"><label><xref ref-type="fig" rid="fig2">Figure 2</xref></label><caption><title> Proposed converter with buck, boost, inverted output</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x7.png"/></fig><p>If the converter is operating in discontinuous conduction mode, the cycle repeats after a dead time. For operation in continuous conduction mode, the inductor current reaches its steady-state minimum value at the end of d<sub>3</sub>T<sub>s</sub>. There are five modes of operation in the converter. The inductor current waveforms are shown in <xref ref-type="fig" rid="fig3">Figure 3</xref> for discontinuous operation mode of buck and boost outputs.</p></sec><sec id="s2"><title>2. Modes of Operation</title><p>The equivalent circuits during the modes are shown in Figures 4(a)-(d).</p><sec id="s2_1"><title>2.1. Mode 1</title><p>Initially, at the beginning of the cycle, the switches S<sub>0</sub> and S<sub>2</sub> are turned ON and the inductors L<sub>1</sub> and L<sub>2</sub> are charged simultaneously for duration of dT<sub>s</sub> and d<sub>1</sub>T<sub>s</sub> respectively. During the charging of the inductor L<sub>2</sub>, the buck output is also simultaneously fed power.</p></sec><sec id="s2_2"><title>2.2. Mode 2</title><p>In mode 2, the switch S<sub>0</sub> is turned OFF and the diode D<sub>1</sub> becomes forward biased and starts conducting. The energy stored in the inductor L<sub>1</sub> is discharged through D<sub>1</sub> (i.e. the current flows from inductor L<sub>1</sub> through D<sub>1</sub>) to drive the inverted output for the balance duration in the cycle.</p></sec><sec id="s2_3"><title>2.3. Mode 3</title><p>In this mode, the switch S<sub>2</sub> is turned OFF when the requirement of buck output is met. The switch S<sub>1</sub> is turned ON to further charge inductor L<sub>2</sub> since the boost output may require more energy than what is already stored in the inductor L<sub>2</sub> to produce the required output voltage.</p></sec><sec id="s2_4"><title>2.4. Mode 4</title><p>When switch S<sub>1</sub> is turned OFF, the stored energy in the inductor L<sub>2</sub> is completely transferred to the boost output through diode D<sub>3</sub> till the current becomes zero.</p></sec><sec id="s2_5"><title>2.5. Mode 5</title><p>After a dead time given by<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x8.png" xlink:type="simple"/></inline-formula>, the cycle repeats.</p><p>The modes of operation for the continuous conduction mode are similar to the above with the difference that</p><fig id="fig3"  position="float"><label><xref ref-type="fig" rid="fig3">Figure 3</xref></label><caption><title> Inductor current waveforms of L<sub>1</sub> and L<sub>2</sub> (DCM)</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x9.png"/></fig><fig id="fig4"  position="float"><label><xref ref-type="fig" rid="fig4">Figure 4</xref></label><caption><title> (a) Equivalent circuit for Mode 1. (b) Equivalent circuits for Modes 2. (c) Equivalent circuits for Mode 3. (d) Equivalent circuits for Mode 4</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x10.png"/></fig><p>that the current starts from a value of “m” in the beginning of the cycle and at the end of the cycle, it again reaches “m” (at steady state). The inductor current waveforms are shown in <xref ref-type="fig" rid="fig5">Figure 5</xref>.</p></sec></sec><sec id="s3"><title>3. Steady State Analysis and Design</title><sec id="s3_1"><title>3.1. Discontinuous Conduction Mode (DCM)―<xref ref-type="fig" rid="fig3">Figure 3</xref></title><p>During Mode 1, from volt-second balance of inductor L<sub>2</sub>,</p><disp-formula id="scirp.65627-formula539"><graphic  xlink:href="http://html.scirp.org/file/5-7600476x11.png"  xlink:type="simple"/></disp-formula><fig-group id="fig5"><label><xref ref-type="fig" rid="fig5">Figure 5</xref></label><caption><title> Inductor current waveforms of L<sub>1</sub>, L<sub>2</sub> (CCM).</title></caption><fig id ="fig5_1"><label></label><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x12.png"/></fig></fig-group><p><img src="http://html.scirp.org/file/5-7600476x13.png" />,<img src="http://html.scirp.org/file/5-7600476x14.png" /> (1.1)</p><p>From capacitor charge-balance considerations,</p><p><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x15.png" xlink:type="simple"/></inline-formula>, or</p><disp-formula id="scirp.65627-formula540"><label>(1.2)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x16.png"  xlink:type="simple"/></disp-formula><p>During Mode 2, the inductor current rises from “m” to “n”. Applying volt-second balance</p><disp-formula id="scirp.65627-formula541"><label>(1.3)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x17.png"  xlink:type="simple"/></disp-formula><p>During Mode 3, the current falls from “n” to zero. Applying volt-second balance for the inductor L<sub>2</sub>,</p><disp-formula id="scirp.65627-formula542"><label>(1.4)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x18.png"  xlink:type="simple"/></disp-formula><p>Applying charge balance consideration to the boost output,</p><p><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x19.png" xlink:type="simple"/></inline-formula>or <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x20.png" xlink:type="simple"/></inline-formula> (1.5)</p><p>For discontinuous conduction mode operation, the dead time gives an additional degree of freedom which helps to achieve a unique solution. If the dead time is chosen as 5%, the sum of the three duty cycles d<sub>1</sub>, d<sub>2</sub> and d<sub>3</sub> would be 0.95 which is a required design equation.</p><disp-formula id="scirp.65627-formula543"><label>(1.6)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x21.png"  xlink:type="simple"/></disp-formula><p>Since <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x22.png" xlink:type="simple"/></inline-formula> is considered as one variable, there are 6 variables, “d<sub>1</sub>”, “d<sub>2</sub>”, “d<sub>3</sub>”, “m”, “n” and “a” and six equations from (1.1) to (1.6). Hence an unique solution can be obtained. Knowing “a” and choosing T<sub>s</sub>, L<sub>2</sub> can be obtained. The negative output is from a buck-boost converter whose output voltage (for continuous conduction) is</p><disp-formula id="scirp.65627-formula544"><label>(1.7)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x23.png"  xlink:type="simple"/></disp-formula><p>The inductor value L<sub>1</sub> can be obtained based on ripple considerations. Assuming a permitted inductor ripple current of “r” % of the rated current,</p><disp-formula id="scirp.65627-formula545"><label>(1.8)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x24.png"  xlink:type="simple"/></disp-formula><p>From volt-second balance of inductor L<sub>1</sub>,</p><disp-formula id="scirp.65627-formula546"><label>(1.9)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x25.png"  xlink:type="simple"/></disp-formula><p>From (1.7), (1.8) and (1.9),</p><disp-formula id="scirp.65627-formula547"><label>(1.10)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x26.png"  xlink:type="simple"/></disp-formula><p>From (1.10), L<sub>1</sub> can be obtained for a permitted ripple “r”. As a design example, the specifications for a chosen converter is shown in <xref ref-type="table" rid="table1">Table 1</xref>. The corresponding design parameters are obtained from Equations (1.1) to (1.10) above. The value of “a” is obtained as “1” and choosing a switching frequency of 50 KHz, the time period is 20uS and the inductance value L<sub>2</sub> is obtained as 20 uH. Inductance value L<sub>1</sub> is found to be 141 uH. The duty cycles are found to be d<sub>1</sub> = 0.535, d<sub>2</sub> = 0.053 and d<sub>3</sub> = 0.365.</p></sec><sec id="s3_2"><title>3.2. Range of Operation</title><p>While the buck output is supplied, the inductor is also charged along with it. The energy stored in the inductor at the end of the buck operation may not be adequate for supplying the boost output and additional charging may be required for the time duration d<sub>2</sub>T<sub>s</sub>. The condition for this is obtained as follows:</p><p>For d<sub>2</sub> to exist, n should be greater than “m” and<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x27.png" xlink:type="simple"/></inline-formula>. From (1.1) and (1.2)</p><disp-formula id="scirp.65627-formula548"><label>(1.11)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x28.png"  xlink:type="simple"/></disp-formula><p>From (1.4) &amp; (1.5),</p><disp-formula id="scirp.65627-formula549"><label>(1.12)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x29.png"  xlink:type="simple"/></disp-formula><p>For <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x30.png" xlink:type="simple"/></inline-formula> , using (1.11) and (1.12) and simplifying,</p><disp-formula id="scirp.65627-formula550"><graphic  xlink:href="http://html.scirp.org/file/5-7600476x31.png"  xlink:type="simple"/></disp-formula><p>is the required condition, where <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x32.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x32.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x33.png" xlink:type="simple"/></inline-formula> are the load power and load current of the i<sup>th</sup> output<sup> </sup>.</p></sec><sec id="s3_3"><title>3.3. Continuous Conduction Mode (CCM)―<xref ref-type="fig" rid="fig5">Figure 5</xref></title><p>From volt-second considerations of inductor L<sub>2</sub>,</p><disp-formula id="scirp.65627-formula551"><label>(1.13)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x34.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.65627-formula552"><label>(1.14)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x35.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.65627-formula553"><label>(1.15)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x36.png"  xlink:type="simple"/></disp-formula><p>From output capacitor charge balance considerations,</p><disp-formula id="scirp.65627-formula554"><label>(1.16)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x37.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.65627-formula555"><label>(1.17)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x38.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.65627-formula556"><label>(1.18)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x39.png"  xlink:type="simple"/></disp-formula><table-wrap id="table1" ><label><xref ref-type="table" rid="table1">Table 1</xref></label><caption><title> Specifications of converter</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Circuit parameters</th><th align="center" valign="middle" >Values</th></tr></thead><tr><td align="center" valign="middle" >Supply voltage V<sub>s</sub></td><td align="center" valign="middle" >12 V</td></tr><tr><td align="center" valign="middle" >Switching frequency</td><td align="center" valign="middle" >50 KHz</td></tr><tr><td align="center" valign="middle" >Load resistance R<sub>1</sub></td><td align="center" valign="middle" >30 Ω</td></tr><tr><td align="center" valign="middle" >Load resistance R<sub>2</sub></td><td align="center" valign="middle" >10 Ω</td></tr><tr><td align="center" valign="middle" >Load resistance R<sub>3</sub></td><td align="center" valign="middle" >5 Ω</td></tr><tr><td align="center" valign="middle" >Output voltage V<sub>1</sub></td><td align="center" valign="middle" >24 V</td></tr><tr><td align="center" valign="middle" >Output voltage V<sub>2</sub></td><td align="center" valign="middle" >−5 V</td></tr><tr><td align="center" valign="middle" >Output voltage V<sub>3</sub></td><td align="center" valign="middle" >+5 V</td></tr></tbody></table></table-wrap><p>There are 7 variables, “d<sub>1</sub>”, “d<sub>2</sub>”, “d<sub>3</sub>”, “m”, “n”, “p”, “T<sub>s</sub>/L” and six equations from (1.13) to (1.18). Since there are 6 equations for 7 variables, there is no unique solution and several solutions are possible. For higher values of “m”, the average current to each output increases and ripple decreases, T<sub>s</sub>/L<sub>2</sub> would decrease and L<sub>2</sub> would increase for particular T<sub>s</sub>. The solution can be obtained from any iterative software and a typical solution for a switching frequency of 50 KHz is L<sub>1</sub> as 141 &#181;H, L<sub>2</sub> as 87 &#181;H, d<sub>1</sub> as 0.52, d<sub>2</sub> as 0.09 and d<sub>3</sub> as 0.39. The simulation of the system was done using PSIM software with the specifications of the converter as given in <xref ref-type="table" rid="table1">Table 1</xref>. The simulation waveforms for the inductor currents, switch currents and output voltages for the converter are shown in Figures 6(a)-(e) for discontinuous conduction mode. The waveforms for continuous conduction mode are shown in Figures 7(a)-(f).</p></sec></sec><sec id="s4"><title>4. Control through Duty Cycle Estimation</title><p>The control strategy followed in this paper is based on the approaches suggested by Zhonghan Shert et al. in [<xref ref-type="bibr" rid="scirp.65627-ref16">16</xref>] and Chen in [<xref ref-type="bibr" rid="scirp.65627-ref13">13</xref>] . The valley current measured at the beginning of the present cycle and the duty cycles of the present cycle are used to predict the valley current at the beginning of the next cycle. This information along with the outputs of the voltage regulators (corresponding to the different outputs) are used as input information, to estimate the duty cycles for the next cycle. In the method suggested in [<xref ref-type="bibr" rid="scirp.65627-ref16">16</xref>] , to simplify the equations, the authors have assumed that the inductor ripple current is small. In the proposed method, since we are directly determining the currents at every switching transition analytically, we are able to solve the equations exactly and hence this constraint of small ripple current is redundant and the control works even for smaller inductances with larger ripples. This is shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(i) where the waveforms are shown for an inductor value of 7.5 &#181;H instead of 30 &#181;H. The prediction part of the control is limited to determining the current at the beginning of the next cycle from the present duty cycle and current information.</p><p>The output of the PI voltage regulator for a particular output indicates the demanded current and this must</p><fig id="fig6"  position="float"><label><xref ref-type="fig" rid="fig6">Figure 6</xref></label><caption><title> (a) Inductor current L<sub>1</sub> (Amps) in DCM V<sub>s</sub> time. (b) Inductor current L<sub>2</sub> (Amps) in DCM V<sub>s</sub> time. (c) Switch current S<sub>0</sub> (Amps) in DCM Vs time. (d) Switch current S<sub>0</sub> (Amps) in DCM V<sub>s</sub> time. (e) Output Voltages</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x40.png"/></fig><fig id="fig7"  position="float"><label><xref ref-type="fig" rid="fig7">Figure 7</xref></label><caption><title> (a) Inductor current (Amps) of L<sub>1</sub> in CCM V<sub>s</sub> time (V<sub>1</sub> = 24 V, V<sub>2</sub> = −5 V, V<sub>3</sub> = 5 V). (b) Inductor current (Amps) of L<sub>2</sub> in CCM Vs time. (c) Switch current (Amps) of S<sub>0</sub> in CCM V<sub>s</sub> time. (d) Switch current (Amps) of S<sub>1</sub> in CCM V<sub>s</sub> time. (e) Switch current (Amps) of S<sub>2</sub> in CCMVs time. (f) Output Voltage (Volts) in CCM V<sub>s</sub> time (V<sub>1</sub> = 24 V, V<sub>2</sub> = −5 V, V<sub>3</sub> = 5 V)</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x41.png"/></fig><p>relate to the overall average inductor current during the period when power is discharged in to the particular buck/boost output. Using this property, the duty cycles for the different modes are estimated. The duty cycles of the different modes are predicted based on the present duty cycles and the current demand of the two outputs. The actual (valley) current at the beginning of the cycle is measured and this corresponds to the value of “m” in the equations (1.13) to (1.18) discussed above. The current “m” is typically measured with an analog-digital converter like TLC1541. Multiple current measurements are not required and only one sample is required at the beginning of a full time period. Alternatively, a current mirror concept can also be used. The buck and boost outputs are compared with their set points and the error signals are passed through PI regulators. The output of the regulators for the buck and boost outputs are denoted as <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x42.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x42.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/5-7600476x43.png" xlink:type="simple"/></inline-formula> in the equations (1.16) and (1.17).</p><disp-formula id="scirp.65627-formula557"><label>(1.19)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x44.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.65627-formula558"><label>(1.20)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x45.png"  xlink:type="simple"/></disp-formula><p>Choosing (T<sub>s</sub>/L) and measuring “m”, “n” can be found. From (1.13), since “n” is found, d<sub>1</sub> can be obtained as</p><disp-formula id="scirp.65627-formula559"><label>(1.21)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x46.png"  xlink:type="simple"/></disp-formula><p>The average inductor current during mode 2 (say “K”) can be obtained as the difference between the overall average inductor current and the sum of the average currents of the two outputs as</p><disp-formula id="scirp.65627-formula560"><label>(1.22)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x47.png"  xlink:type="simple"/></disp-formula><p>Combining (1.22) with (1.14), d<sub>2</sub> can be obtained as</p><disp-formula id="scirp.65627-formula561"><label>(1.23)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x48.png"  xlink:type="simple"/></disp-formula><fig-group id="fig8"><label><xref ref-type="fig" rid="fig8">Figure 8</xref></label><caption><title> Prediction control algorithm. (a) Power and control schematic-Part 1. (b) Power and control schematic-Part 2. (c) Power and control schematic-Part 3. (d) Output voltages and inductor current (L = 30 &#181;H). (e) Change in boost load from 0.53 to 0.96 A (L = 30 &#181;H). (f) Effect of sudden change in buck load (L = 30 &#181;H). (g) Output voltage, Inductor current, Triangular carrier. (h) Change in supply from 10 to 16 V (L = 7.5 &#181;H). (i) Change in supply from 16 to 10 V (L = 7.5 &#181;H).</title></caption><fig id ="fig8_1"><label></label><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x49.png"/></fig><fig id ="fig8_2"><label></label><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x50.png"/></fig><fig id ="fig8_3"><label></label><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x51.png"/></fig></fig-group><p>Knowing d<sub>1</sub> and d<sub>2</sub>, d<sub>3</sub> can be found as</p><disp-formula id="scirp.65627-formula562"><label>(1.24)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/5-7600476x52.png"  xlink:type="simple"/></disp-formula><p>The algorithm for the prediction control is shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>. The control block diagram is shown in Figures 8(a)-(c) below for the buck and boost outputs. The inverted output is an independent output and can be controlled without any difficulty. The closed loop simulation results for the buck and boost outputs are shown in Figures 8(d)-(i). The inductor current (without slope compensation) and the output voltages are shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(d). The effect of a sudden change in the boost output between 0.53 to 0.96 A is shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(e). Similarly, the effect of a sudden change in the buck output between 0.125 to 0.5 A is shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(f). The output voltages are found to be closely regulated and no cross regulation are observed. The period-doubling current oscillations can be removed by using a triangular carrier as suggested by Chen et al. (2003) and the corresponding inductor current and output voltages along with the carrier waveforms are shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(g).</p><p>To highlight the fact that the predictive control also works for a large ripple, the inductance value was changed from 30 &#181;H to 7.5 &#181;H and for a sudden change in supply voltage between 10 and 16 V, the output voltages, duty cycles and inductor current waveforms are shown in Figures 8(h)-(i). In <xref ref-type="fig" rid="fig8">Figure 8</xref>(h), for a sudden increase in the supply voltage from 10 to 16 V, the duty cycles adjust themselves to maintain the output voltages at the required values. Similarly, for a sudden drop in supply voltage, the inductor current smoothly rises as shown in <xref ref-type="fig" rid="fig8">Figure 8</xref>(i) to regulate the outputs.</p></sec><sec id="s5"><title>5. Experimental Results</title><p>The hardware implementation is done for the converter in discontinuous mode using an FPGA controller, Spartan 3E XC3S250E system working at a clock frequency of 20 MHz. The pulses generated from the FPGA controller are passed through opto-couplers 6N137 and then given to the driver TC4584BP. They are then used to switch the MOSFETs IRF 840. The hardware waveforms are given in Figures 9(a)-(e) and the hardware setup is shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>0.</p><fig id="fig9"  position="float"><label><xref ref-type="fig" rid="fig9">Figure 9</xref></label><caption><title> (a) Gate pulses to the switches. (b) Inductor current waveform. (c) Boost output. (d) Inverted output. (e) Buck output</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x53.png"/></fig><fig id="fig10"  position="float"><label><xref ref-type="fig" rid="fig1">Figure 1</xref>0</label><caption><title> Hardware setup</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/5-7600476x54.png"/></fig></sec><sec id="s6"><title>6. Conclusion</title><p>This paper proposed an alternate converter with a main and an auxiliary inductor, capable of generating both positive and negative outputs and in both buck and boost configurations. The topology does not involve any reverse power flow to the supply and hence time periods can be shorter and higher power levels are possible. The topology is validated through simulation using PSIM software and further through hardware results obtained with a Spartan FPGA system. The suggested topology is generic and is extendable to more outputs. A novel control method through duty cycle estimation has been suggested which is capable of regulating output voltages against line and load disturbances. Since the duty cycles of the next time period are estimated in the present cycle by direct computation, the control method is capable of overcoming cross-regulation issues.</p></sec><sec id="s7"><title>Cite this paper</title><p>Kumaraswami Sundararaman,Mahadevan Gopalakrishnan, (2016) A Bi-Polar Triple-Output Converter with Duty Cycle Estimation. Circuits and Systems,07,198-210. doi: 10.4236/cs.2016.74019</p></sec></body><back><ref-list><title>References</title><ref id="scirp.65627-ref1"><label>1</label><mixed-citation publication-type="other" xlink:type="simple">Xu, W.W., Li, Y., Gong, X., Hong, Z. and Killat, D. (2010) A Dual-Mode Single-Inductor Dual-Output Switching Converter with Small Ripple. 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