Universal biquadratic filters are those which provide all standard filter functions (low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP)), without modifying the circuit topology. The advancement in the field of microelectronics presents current mode active building blocks for design of fast and high performance analog signal processing circuits and systems [1] . The current mode active blocks may process signals in voltage as well as current mode. A number of current mode filters using various analog building blocks (ABB) are available in literature under the classification of multi-input multi-output (MIMO) [2] -[5] , single-input multi- output (SIMO) [6] -[11] and multi-input single-output (MISO) [12] - [24] . In addition, a range of current conveyor blocks with inbuilt transconductance amplifier (TA) in monolithic chip, such as current conveyor transconductance amplifier (CCTA) [25] , current difference transconductance amplifier (CDTA) [26] , current controlled current conveyor transconductance amplifier (CCCCTA) [27] , differential voltage current conveyor transconductance amplifier (DVCCTA) [19] , differential difference current conveyor transconductance amplifier (DDCCTA) [4] , differential voltage current controlled conveyor transconductance amplifier (DVCCCTA) [28] and current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA) [29] , have emerged in last few years. Among these, CCDDCCTA is a recently introduced ABB. It is basically composed of current controlled differential difference current conveyor (CCDDCC) [30] followed by a transconductance amplifier (TA) block. It has high input impedance terminals for voltage and high output impedance terminals for currents. It can process both differential and floating inputs. It inherits all the good properties of CCDDCC, CCCCTA and DDCCTA along with electronic tuning of transconductance, which is found to be useful in design of various circuits with lesser number of resistors and integrated circuit implementation.

The study of MISO universal filters [13] - [24] based on current mode ABB reveals that these circuits suffer one or more of the following weakness:

(a) Use of two or more ABBs [13] - [16] [18] [20] - [24] ;

(b) Excessive use of the passive components [15] - [17] [19] [21] ;

(c) No grounded passive components [15] [16] ;

(d) Requirement of four or more input current signal to get all the responses [15] - [18] ;

(e) Requirement of gain of input signal such as 2I_in or 3I_in [13] - [15] [20] [23] [24] ;

(f) Lack of electronic tunability [15] [16] ;

(g) Non-orthogonality of pole frequency and quality factor [13] - [15] [20] - [22] [24] .

A new current mode universal filter with a reduced number of passive components has been presented. The proposed filter is a multi-input single-output (MISO) and uses two grounded capacitors and one CCDDCCTA only. The proposed current mode filter circuit can realize high pass (HP), low pass (LP), band pass (BP), notch and all pass (AP) filter responses by selecting appropriate input current without alteration of the topology. It can easily be cascaded, as its output is current and impedance is high. All the features of the proposed filter can be electronically adjusted by biasing currents of the CCDDCCTA. Moreover, the high-Q filter may easily be achieved by using the bias currents of CCDDCCTA. A comparative study of the available active elements based on current mode filters is also presented. PSPICE simulation results verify the theoretical analysis.

The symbol of CCDDCCTA and its implementation using CMOS are shown in Figure 1 and Figure 2 respectively.

The port relationships of the CCDDCCTA can be represented by the following matrix:

where, the intrinsic resistance at X terminal defined as

where,

Similarly, the transconductance from Z terminal to O terminal may be expressed as

It may be noted that both and can be electronically varied by bias currents I_B1 and I_B2 of CCDDCCTA respectively.

The proposed current mode (CM) filter is shown in Figure 3 which utilizes two grounded capacitors and one CCDDCCTA only. The routine analysis of circuit gives the output current at single node as:

The inspection of Equation (6) reveals that the circuit of Figure 3 will function as a universal filter depending upon combination of inputs (I_in1, I_in2 and I_in3) applied at three terminals. The output response (I_out) for different combinations of inputs are shown in Table 1. It reveals that no component constraint is required for LP and BP response; however for HP, notch and AP responses a simple component matching is required. The circuit is suitable for cascading to another circuit having low input impedance for current input.

The filter parameters, namely natural angular frequency, bandwidth (BW) and quality factor are obtained respectively as

, , and (7)

It reveals in Table 1 and (7) that for LP and BP responses and can be varied with I_B2 without disturbing. The variation of without disturbing may be achieved by simultaneously varying I_B1 and I_B2, such that the product remains constant and the quotient varies and vice-versa. Similarly for HP and notch responses can be varied independent of by keeping the product unity and varying the quotient using I_B1 and I_B2. It may also be shown from (7) that high value of quality factor can be obtained from the low spread of capacitance (C₁ and C₂) values [31] . If the ratio of C₁ and C₂ are chosen as, then the spread of components comes out to be. This feature of the proposed filter allows the realization of high with low spread of C₁ and C₂ in comparison to topologies where the spread is or.

The sensitivity of a parameter Y to variation of element X may be defined as

The sensitivity analysis of the proposed circuits for various parameters is evaluated as

, ,

,.

It reveals that the sensitivity is low and less then unity in magnitude.

The performance of the proposed current mode filter might be deviated from the ideal response due to non- idealities of CCDDCCTA. The first non-ideality comes due to the internal current (α) and voltage (β) transfer of CCDDCCTA and hence modified port relationships with current and voltage transfer non-ideality can be expressed in matrix form as

where, voltage tracking error coefficient, and are from Y₁, Y₂ and Y₃ terminals to X terminal respectively. The current tracking error coefficient is from X to Z terminal. The current gain coefficient is from Z terminal to O terminal. Considering these tracking coefficient, modified output current of the circuit is obtained as:

The filter parameters can be expressed as

, ,. (12)

It is noticed that the non-idealities affect the parameters of the filter. The sensitivity analysis of, and BW results as follows:

, , ,

, , , (13)

, ,.

It reveals that with non-ideality; the sensitivity is still low and magnitude is within unity.

The second non-ideality comes due to the parasites of CCDDCCTA comprising of capacitances and resistances connected in parallel at Z, O and Y terminals. The effect of these parasites is very much dependent on the circuit topology. The current mode universal filter with non-ideality is shown in Figure 4. The modified capacitances are and and modified resistances/conductances are and. Here, C_Y2, C_Y3, C_Z and C_O1 are the parasitic capacitances at Y₂, Y₃, Z and O1 terminals respectively. Similarly, R_Y2, R_Y3, R_Z and R_O1 are parasitic resistances at Y₂, Y₃, Z and O1 terminals respectively. It is evident that the effect of parasitic capacitances can be compensated by taken the external capacitances C₁ and C₂ lesser by (C_Y3 + C_O1) and (C_Y2 + C_Z) respectively from their calculated values. The effect of parasitic conductances may also be made insignificant if operating frequency and value of C₁ and C₂ are chosen in such a way that and.

The current mode universal filter as proposed in Figure 3 is simulated with PSPICE. The 0.25 µm CMOS TSMC technology process parameters are used for simulation. The aspect ratio of various transistors is stated in Table 2. The supply voltages of ±1.25 V and V_BB = −0.8 V are used. To design the filter for a pole frequency of = 1.28 MHz and quality factor = 1, the component values are taken as C₁ = C₂ = 100 pF and bias current as I_B1 = 25 µA and I_B2 = 200 µA. The input for each filter realization is selected as per Table 1. Figures 5-8 shows the simulated and theoretical low pass, high pass, band pass and notch responses respectively. The value of I_B1 is set as 12.5 µA and I_B2 = 200 µA for the realization of all pass responses as shown in Figure 9.

To test the orthogonal variation of with, a band pass filter is chosen. The variation of with = 1 is shown in Figure 10 for different value of bias currents (I_B2 = 8 I_B1) as given in Table 3. Similarly Figure 11 shows orthogonal adjustment of with = 1.28 MHz for different value of I_B1 and I_B2 as mentioned in Table 4.

It is well known that a little tolerance of the value of the various components occurs during manufacturing and even afterword resulting in deviation of various parameters of filters such as central frequency, quality factor and bandwidth from its designed values. The collection of statistical data due to tolerance of passive components is obtained using Monte-Carlo analysis for band pass filter. As an example, for a 100 pF ± 5% capacitor, the actual measured capacitor value to be somewhere between 95 pF and 105 pF. Monte-Carlo runs to cover as

many possible values of the component within their tolerance limits. It is performed by taking 5% Gaussian deviation of C₁ and C₂ values for 200 simulation runs for a pole frequency of 1.28 MHz. The result of Monte- Carlo simulation is shown in Figure 12 and corresponding histogram in Figure 13. As per statistical results as shown in Figure 13, the minimum and maximum frequency obtained are 1.18 MHz and 1.38 MHz respectively and standard deviation is 42.2 KHz. It reveals that the proposed filter exhibits a reasonable sensitivity performance. The quality of the output response may be judged with the help of percentage total harmonic distortion (%THD). The %THD of the output response for band pass filter with respect to the input is shown in Figure 14. It is found that the %THD is well within the tolerance range of 5%.

Comparative study of different available implementation of current mode MISO universal filters is given in Table 5. It is evident that most of the circuits suffers from one or more weakness in comparison to the proposed one. However circuits proposed in [17] [19] uses one active building block as that of the proposed one. The circuit of [17] uses excessive number of passive components and is comparable to the proposed one.

Current mode universal filter using current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA) has been presented that uses two grounded capacitors and one CCDDCCTA only. It can realize high pass, low pass, band pass, notch and all pass responses from the same topology. The filter parameter can be electronically adjustable by bias currents I_B1 and I_B2. Table 5 shows the comparative study of the available current mode building block based MISO filters. PSPICE simulation results authenticate the theoretical results.

Ajay KumarKushwaha,Sajal K.Paul, (2015) Current Mode Universal Filter Using Single Current Controlled Differential Difference Current Conveyor Transconductance Amplifier. Circuits and Systems,06,224-236. doi: 10.4236/cs.2015.610023