<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">CS</journal-id><journal-title-group><journal-title>Circuits and Systems</journal-title></journal-title-group><issn pub-type="epub">2153-1285</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/cs.2015.63006</article-id><article-id pub-id-type="publisher-id">CS-54855</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Computer Science&amp;Communications</subject><subject> Engineering</subject><subject> Physics&amp;Mathematics</subject></subj-group></article-categories><title-group><article-title>
 
 
  Single VDVTA-Based Voltage-Mode Biquad Filter
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>hanshyam</surname><given-names>Singh</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Dinesh</surname><given-names>Prasad</given-names></name><xref ref-type="aff" rid="aff2"><sup>2</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>D.</surname><given-names>R. Bhaskar</given-names></name><xref ref-type="aff" rid="aff2"><sup>2</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib></contrib-group><aff id="aff1"><addr-line>Department of Electronics and Communication Engineering, HMRITM, Hamidpur, Delhi, India</addr-line></aff><aff id="aff2"><addr-line>Department of Electronics and Communication Engineering, Faculty of Engineering and Technology, Jamia Millia Islamia, New Delhi, India</addr-line></aff><author-notes><corresp id="cor1">* E-mail:<email>ghanshyamsingh_09@rediffmail.com(HS)</email>;<email>dprasad@jmi.ac.in(DP)</email>;<email>dbhaskar@jmi.ac.in(DRB)</email>;</corresp></author-notes><pub-date pub-type="epub"><day>11</day><month>03</month><year>2015</year></pub-date><volume>06</volume><issue>03</issue><fpage>55</fpage><lpage>59</lpage><history><date date-type="received"><day>19</day>	<month>February</month>	<year>2015</year></date><date date-type="rev-recd"><day>accepted</day>	<month>19</month>	<year>March</year>	</date><date date-type="accepted"><day>20</day>	<month>March</month>	<year>2015</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
  In this paper, an
   application of voltage differencing voltage transconductance amplifier (VDVTA) in the realization of voltage-mode (VM) multi-input single output (MISO) type biquad is presented. The proposed topology uses one VDVTA as an active element, two capacitors and a grounded resistor. The configuration realizes low pass (LP), high pass (HP), band pass (BP) and notch (BR) filters without the requirement of any matching condition. The natural frequency (
  w
  <sub>0</sub>
  ) and bandwidth (BW) are independently controllable. The proposed circuit offers low active and passive sensitivities of 
  w
  <sub>0</sub>
  . The operation of the proposed circuit has been verified through SPICE simulation with TSMC CMOS 0.18 μm process parameters.
 
</p></abstract><kwd-group><kwd>Voltage Differencing Voltage Transconductance Amplifier</kwd><kwd> Analog Filter</kwd><kwd> LP</kwd><kwd> HP</kwd><kwd> BP</kwd><kwd> BR</kwd><kwd> Voltage Mode</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>A number of VM MISO biquads utilizing different active elements have been proposed by the various researchers employing single active device [<xref ref-type="bibr" rid="scirp.54855-ref1">1</xref>] -[<xref ref-type="bibr" rid="scirp.54855-ref11">11</xref>] . MISO-type biquads are especially versatile because the same topology can be utilized through proper selection of input signal(s) to realize different filter functions. Such filters may be used in the implementation of touch tone telephone systems, FM stereo demodulators, phase locked loop etc. [<xref ref-type="bibr" rid="scirp.54855-ref12">12</xref>] . A number of new active elements have been presented in [<xref ref-type="bibr" rid="scirp.54855-ref13">13</xref>] . Recently Shaktour in [<xref ref-type="bibr" rid="scirp.54855-ref14">14</xref>] has used VDVTA in the formation of first order all pass (AP) filter. In this communication, we propose another application using single VDVTA for the realization of MISO-type biquad using three inputs and one output with two capacitors and one grounded resistor. The proposed circuit realizes four basic filter functions, namely LP, HP, BP and BR. In the case of LP filter, the structure enjoys an extra advantage of having both the capacitors grounded as preferred for integration point of view [<xref ref-type="bibr" rid="scirp.54855-ref15">15</xref>] . The circuit offers the advantage of independent control</p><p>of <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x6.png" xlink:type="simple"/></inline-formula> and<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x7.png" xlink:type="simple"/></inline-formula>. SPICE simulation results using TSMC CMOS 0.18 μm process and &#177;0.9 V DC power supply</p><p>voltages verify the theoretical prediction.</p></sec><sec id="s2"><title>2. The Proposed Circuit Topology</title><p>The block diagram of the VDVTA is shown in <xref ref-type="fig" rid="fig1">Figure 1</xref>, where<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x8.png" xlink:type="simple"/></inline-formula>, <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x9.png" xlink:type="simple"/></inline-formula>and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x10.png" xlink:type="simple"/></inline-formula> are input terminals and<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x11.png" xlink:type="simple"/></inline-formula>, <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x12.png" xlink:type="simple"/></inline-formula>and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x13.png" xlink:type="simple"/></inline-formula> are output terminals. All terminals of VDVTA exhibit high impedance values [<xref ref-type="bibr" rid="scirp.54855-ref14">14</xref>] . The VDVTA can be characterised by the following terminal equations:</p><disp-formula id="scirp.54855-formula34"><label>(1)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x14.png"  xlink:type="simple"/></disp-formula><p>The circuit analysis of <xref ref-type="fig" rid="fig2">Figure 2</xref> yields the following output equation in terms of input signals:</p><disp-formula id="scirp.54855-formula35"><label>(2)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x15.png"  xlink:type="simple"/></disp-formula><p>Through proper selection of input signal(s) from Equation (2), <xref ref-type="fig" rid="fig2">Figure 2</xref> realizes the following filter functions:</p><p>1) LPF; if <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x16.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x17.png" xlink:type="simple"/></inline-formula> i.e.,</p><disp-formula id="scirp.54855-formula36"><label>(3)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x18.png"  xlink:type="simple"/></disp-formula><fig id="fig1"  position="float"><label><xref ref-type="fig" rid="fig1">Figure 1</xref></label><caption><title> The symbolic notation of VDTA</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/2-7600379x19.png"/></fig><fig id="fig2"  position="float"><label><xref ref-type="fig" rid="fig2">Figure 2</xref></label><caption><title> The proposed VM MISO-type configuration</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/2-7600379x20.png"/></fig><p>2) BPF; if <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x21.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x21.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x22.png" xlink:type="simple"/></inline-formula> i.e.,</p><disp-formula id="scirp.54855-formula37"><label>(4)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x23.png"  xlink:type="simple"/></disp-formula><p>3) HPF; if <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x24.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x24.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x25.png" xlink:type="simple"/></inline-formula> i.e.,</p><disp-formula id="scirp.54855-formula38"><label>(5)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x26.png"  xlink:type="simple"/></disp-formula><p>4) BRF; if <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x27.png" xlink:type="simple"/></inline-formula> and <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x27.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x28.png" xlink:type="simple"/></inline-formula> i.e.,</p><disp-formula id="scirp.54855-formula39"><label>(6)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x29.png"  xlink:type="simple"/></disp-formula><p>from Equations (3)-(6), it is clear that there is no requirement of any matching condition.</p><p>Where</p><disp-formula id="scirp.54855-formula40"><graphic  xlink:href="http://html.scirp.org/file/2-7600379x30.png"  xlink:type="simple"/></disp-formula><p>The natural frequency<inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x31.png" xlink:type="simple"/></inline-formula>, <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x31.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x32.png" xlink:type="simple"/></inline-formula>and quality factor <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x31.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x32.png" xlink:type="simple"/></inline-formula><inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x33.png" xlink:type="simple"/></inline-formula> are given by:</p><disp-formula id="scirp.54855-formula41"><label>(7)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x34.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.54855-formula42"><label>(8)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x35.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.54855-formula43"><label>(9)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/2-7600379x36.png"  xlink:type="simple"/></disp-formula><p>The sensitivities of <inline-formula><inline-graphic xlink:href="http://html.scirp.org/file/2-7600379x37.png" xlink:type="simple"/></inline-formula> with respect to passive components are found to be:</p><disp-formula id="scirp.54855-formula44"><graphic  xlink:href="http://html.scirp.org/file/2-7600379x38.png"  xlink:type="simple"/></disp-formula><p>which are all low.</p></sec><sec id="s3"><title>3. Simulation Results</title><p>To verify the theoretical prediction, the proposed circuit was simulated using CMOS VDVTA (with minor changes as shown in <xref ref-type="fig" rid="fig3">Figure 3</xref>) from [<xref ref-type="bibr" rid="scirp.54855-ref16">16</xref>] . The passive components of the proposed circuit were selected as C<sub>1</sub> = 0.02 nF, C<sub>2</sub> = 0.01 nF and R<sub>1</sub> = 100 KΩ. The transconductances of VDVTA were controlled by bias currents. <xref ref-type="fig" rid="fig4">Figure 4</xref> shows the simulated filter responses of LP, BP, HP and BR. These simulation results, thus, confirm the validity of the MISO-type proposed biquad. The comparison of proposed biquad with other available MISO- type VM-biquads with a single active element is summarized in <xref ref-type="table" rid="table1">Table 1</xref>.</p><fig id="fig3"  position="float"><label><xref ref-type="fig" rid="fig3">Figure 3</xref></label><caption><title> CMOS VDVTA [<xref ref-type="bibr" rid="scirp.54855-ref16">16</xref>] </title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/2-7600379x39.png"/></fig><fig id="fig4"  position="float"><label><xref ref-type="fig" rid="fig4">Figure 4</xref></label><caption><title> Frequency response</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/2-7600379x40.png"/></fig><table-wrap id="table1" ><label><xref ref-type="table" rid="table1">Table 1</xref></label><caption><title> Comparison of proposed biquad with other available MISO-type VM-biquads using a single active device</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >Reference</th><th align="center" valign="middle" >Number of resistors used</th><th align="center" valign="middle" >Number. of capacitors used</th><th align="center" valign="middle" >Whether all five filter functions are realized?</th><th align="center" valign="middle" >Requirement of matching conditions/constraints</th></tr></thead><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref1">1</xref>]</td><td align="center" valign="middle" >3/2</td><td align="center" valign="middle" >2/3</td><td align="center" valign="middle" >No</td><td align="center" valign="middle" >No</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref2">2</xref>]</td><td align="center" valign="middle" >5</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >No</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref3">3</xref>]</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >No</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref4">4</xref>]</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref5">5</xref>]</td><td align="center" valign="middle" >3</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref6">6</xref>]</td><td align="center" valign="middle" >4</td><td align="center" valign="middle" >4</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref7">7</xref>]</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref8">8</xref>]</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref9">9</xref>]</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >Yes</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref10">10</xref>]</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >No</td><td align="center" valign="middle" >No</td></tr><tr><td align="center" valign="middle" >[<xref ref-type="bibr" rid="scirp.54855-ref11">11</xref>]</td><td align="center" valign="middle" >3</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >No</td><td align="center" valign="middle" >Yes</td></tr><tr><td align="center" valign="middle" >Proposed</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >2</td><td align="center" valign="middle" >No</td><td align="center" valign="middle" >No</td></tr></tbody></table></table-wrap></sec><sec id="s4"><title>4. Conclusion</title><p>In this paper, an application of VDVTA is proposed in the form of VM-MISO-type biquad using three passive components. The proposed filter can realize the second-order LP, BP, HP and BR responses without changing the circuit topology and without any matching constraint(s). The LP filter response enjoys an additional advantage of having both the capacitors grounded as preferred for integration point of view [<xref ref-type="bibr" rid="scirp.54855-ref15">15</xref>] . The circuit offers low active and passive sensitivities. The SPICE simulation results using TSMC CMOS 0.18 μm process confirm the workability of the proposed structure.</p></sec><sec id="s5"><title>Cite this paper</title><p>GhanshyamSingh,DineshPrasad,D. R.Bhaskar， (2015) Single VDVTA-Based Voltage-Mode Biquad Filter。 Circuits and Systems，06，55-59. doi: 10.4236/cs.2015.63006</p></sec><sec id="s6"><title>NOTES</title></sec></body><back><ref-list><title>References</title><ref id="scirp.54855-ref1"><label>1</label><mixed-citation publication-type="other" xlink:type="simple">Hou, C.L., Huang, C.C., Lan, Y.S., Shaw, J.J. and Chang, C.M. (1999) Current-Mode and Voltage-Mode Universal Biquads Using a Single Current-Feedback Amplifier. International Journal of Electronics, 86, 929-932. http://dx.doi.org/10.1080/002072199132923</mixed-citation></ref><ref id="scirp.54855-ref2"><label>2</label><mixed-citation publication-type="other" xlink:type="simple">Sharma, R.K. and Senani, R. (2003) Multifunction CM/VM Biquads Realized with a Single CFOA and Grounded Capacitors. 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