<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">WJNSE</journal-id><journal-title-group><journal-title>World Journal of Nano Science and Engineering</journal-title></journal-title-group><issn pub-type="epub">2161-4954</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/wjnse.2014.44017</article-id><article-id pub-id-type="publisher-id">WJNSE-52378</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Chemistry&amp;Materials Science</subject></subj-group></article-categories><title-group><article-title>
 
 
  Neural Network Based on SET Inverter Structures: Neuro-Inspired Memory
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>ilel</surname><given-names>Hafsi</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Rabii</surname><given-names>Elmissaoui</given-names></name><xref ref-type="aff" rid="aff2"><sup>2</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Adel</surname><given-names>Kalboussi</given-names></name><xref ref-type="aff" rid="aff3"><sup>3</sup></xref></contrib></contrib-group><aff id="aff3"><addr-line>IEMN Laboratory, University of Lille1, Avenue Poincaré, 59652 Villeneuve d’Ascq Cedex, France</addr-line></aff><aff id="aff1"><addr-line>Microelectronics and Instrumentation Laboratory, Faculty of Sciences of Monastir, University of Monastir, Monastir, Tunisia</addr-line></aff><aff id="aff2"><addr-line>Research Unit on Study of Industrial Systems and Renewable Energies, National Engineering School of Monastir, Monastir, Tunisia</addr-line></aff><author-notes><corresp id="cor1">* E-mail:<email>Bilel.Hafsi@iemn.univ-lille1.fr(IH)</email>;</corresp></author-notes><pub-date pub-type="epub"><day>19</day><month>11</month><year>2014</year></pub-date><volume>04</volume><issue>04</issue><fpage>134</fpage><lpage>142</lpage><history><date date-type="received"><day>10</day>	<month>October</month>	<year>2014</year></date><date date-type="rev-recd"><day>10</day>	<month>November</month>	<year>2014</year>	</date><date date-type="accepted"><day>9</day>	<month>December</month>	<year>2014</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
  This paper presents a basic block for building large-scale single-electron neural networks. This macro block is completely composed of SET inverter circuits. We present and discuss the basic parts of this device. The full design and simulation results were done using MATLAB and SIMON, which are a single-electron tunnel device and circuit simulator based on a Monte Carlo method. Special measures had to be taken in order to simulate this circuit correctly in SIMON and compare results with those of SPICE simulation done before. Moreover, we study part of the network as a memory cell with the idea of combining the extremely low-power properties of the SET and the compact design.
 
</p></abstract><kwd-group><kwd>Single-Electron</kwd><kwd> Neuron</kwd><kwd> Synapse</kwd><kwd> Inverter</kwd><kwd> Neural Network</kwd><kwd> Single-Electron Memory</kwd><kwd> Perceptron</kwd><kwd> MATLAB</kwd><kwd> SIMON</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>Single-Electron Devices (SEDs) have attracted much attention since the 1980s when it was that they could be used to fabricate memory devices, low-power logic devices and high-performance sensors. Among SEDs, Single- Electron Transistors (SETs) have been the most studied device, because it was seen as a potential successor for present metal-oxide-semiconductor MOS transistor [<xref ref-type="bibr" rid="scirp.52378-ref1">1</xref>] .</p><p>This device is made of an island connected through two tunneling junctions to a drain and a source electrode. The distance between the two conductors is in order of few nanometers, and electron can possibly tunnel through the insulator [<xref ref-type="bibr" rid="scirp.52378-ref2">2</xref>] , when the absolute voltage difference across the junction is decreased due to the event [<xref ref-type="bibr" rid="scirp.52378-ref3">3</xref>] .</p><p>The idea of combining Single-Electron Transistors (SETs) in neural networks architectures has raised considerable interest over recent years because of its potentially unique functionalities. The rationale behind neural networks and SET devices is the possibility of taking advantages of both technologies [<xref ref-type="bibr" rid="scirp.52378-ref3">3</xref>] [<xref ref-type="bibr" rid="scirp.52378-ref4">4</xref>] : the high gain, speed of the SETs, learning capacity and problem-solving abilities of the Artificial Neural Networks (ANNs), in order to lead to Single-Electron Memories (SEMs) with low-power consumption, high density of the SETs and brain behavior qualities.</p><p>In this paper, we present simulations of the two main parts of an elementary neural network based on SET (Perceptron) using SIMON [<xref ref-type="bibr" rid="scirp.52378-ref5">5</xref>] simulator and MATLAB [<xref ref-type="bibr" rid="scirp.52378-ref6">6</xref>] . The purpose of our work was therefore the presentation of the advantages to simulate such an elementary neural network by a Monte Carlo simulator [<xref ref-type="bibr" rid="scirp.52378-ref5">5</xref>] which features a graphical circuit editor embedded in a graphical user interface as well as the simulation of co-tunnel events and a single-step interactive analyses mode. The idea then was to present this neural network as a model of a “smart” SET/SEM device.</p></sec><sec id="s2"><title>2. Single-Electron Devices</title><sec id="s2_1"><title>2.1. Single-Electron Transistor</title><p>Since the 1980s, developments in both semiconductor technology and theory have lead to a completely new field of research focusing on devices whose operation is based on the discrete nature of electrons tunneling through thin potential barriers. These devices which exhibit charging effects including Coulomb blockade are the single-electron devices [<xref ref-type="bibr" rid="scirp.52378-ref7">7</xref>] .</p><p>The single-electron tunneling technology is the most promising future technology generations to meet the required increase in density and performance and decrease in power dissipation [<xref ref-type="bibr" rid="scirp.52378-ref8">8</xref>] . The main component of SET is the tunnel junction that can be implemented using silicon or metal-insulator-metal structures, GaAs quantum dots.</p><p>The tunnel junction can be thought of as a leaky capacitor then electrons are blockaded, the blockade can be overcome and a current flows if the junction voltage V is above the threshold given by the charging energy. Then the junction behaves like resistor.</p><p>Recent research in SET gives new ideas which are going to revolutionize the random access memory and digital data storage technologies.</p></sec><sec id="s2_2"><title>2.2. Single-Electron Memories</title><p>During the last few years the development of new memory devices has attracted much attention These single- electron memories provides a great potential for SETs to be used in the design of nonvolatile Random Access Memory (RAMs), for example, for mobile computer and communication applications [<xref ref-type="bibr" rid="scirp.52378-ref9">9</xref>] .</p><p>Several single-electron memory cells have been proposed in the literature such us the single-electron flip-flop, the Multiple Tunnel Junction (MTJ) proposed by Nakazato and Ahmed [<xref ref-type="bibr" rid="scirp.52378-ref10">10</xref>] , the Q0-independent memory and others.</p><p>Each memory differs from the other by such properties as the complexity of the architecture, the dependence of background charges and the operating temperature.</p><p>Neural networks are suitable architectures for SET devices and the combination of the two technologies has many advantages. Because they are too small SET devises can yield to a powerful neural network with extremely low power dissipation.</p></sec></sec><sec id="s3"><title>3. Neural Network</title><sec id="s3_1"><title>3.1. The Neural Biological Model</title><p>The human brain contains more than a billion of neuron cells, each cell works like a simple processor. The massive interaction between all cells and their parallel processing only makes the brain’s abilities possible [<xref ref-type="bibr" rid="scirp.52378-ref11">11</xref>] .</p><p>By definition, “neurons are basic signaling units of the nervous being in which each neuron is a discrete cell whose several processes are from its cell body” [<xref ref-type="bibr" rid="scirp.52378-ref12">12</xref>] .</p><p><xref ref-type="fig" rid="fig1">Figure 1</xref> shows the biological model of the neuron which has four main regions to its structure: The cell body, the dendrites, the axon and the heart of the cell “the cell body” which contains the nucleolus and maintains protein synthesis.</p><p>The dendrites collect synaptic potentials from other neurons and transmit them to the soma. The soma performs a non-linear processing step (called fire model): if the total synaptic potential exceeds a certain threshold then a spike is generated [<xref ref-type="bibr" rid="scirp.52378-ref13">13</xref>] . A spike is transmitted to other neurons via synapses, the points of connection between two neurons.</p><p>Synapses dominate the architecture of the brain and are responsible for structural plasticity [<xref ref-type="bibr" rid="scirp.52378-ref14">14</xref>] , robustness of the brain and electrochemical communication takes place at these junctions.</p></sec><sec id="s3_2"><title>3.2. Artificial Neural Model</title><sec id="s3_2_1"><title>3.2.1. Perceptron</title><p>The most well-known neural processing element for artificial analog neural networks is one of the Perceptron models of Rosenblatt (1962) [<xref ref-type="bibr" rid="scirp.52378-ref15">15</xref>] . This model is an extension to the older neural model of McCulloch and Pitts (1943) [<xref ref-type="bibr" rid="scirp.52378-ref16">16</xref>] .</p><p>The perceptron forms the basic neural processing element for the artificial analog neural networks, a single layer neural network with weights and biases trained to produce a correct target vector [<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] . It represents the combination of a neuron and n number of synapses. <xref ref-type="fig" rid="fig2">Figure 2</xref> shows the complete perceptron.</p><fig id="fig1"  position="float"><label><xref ref-type="fig" rid="fig1">Figure 1</xref></label><caption><title> Biological neuron model</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x6.png"/></fig><fig id="fig2"  position="float"><label><xref ref-type="fig" rid="fig2">Figure 2</xref></label><caption><title> The complete perceptron, consisting of multiple synapses and a binary neuron</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x7.png"/></fig><p>In the literature, many types of neural networks hardware based on single-electron transistor can be found. Our work is based on a complete two-input perceptron implemented in SET technology by Van de Haar and Hoekstra [<xref ref-type="bibr" rid="scirp.52378-ref18">18</xref>] , which is composed of two important stage, a SET inverter performs the function of the synapse while another one perform the activation function of the neuron.</p><p>SIMON simulations are shown using an input test-pattern that enters all possible states of the neural network. We should know that the various coupling capacitances between device elements, such as the capacitance of tunnel junction, are extracted from SIMON simulator after several trials using stationary simulation. In fact, for every such time step “even number tunnel events are simulated and averaged”.</p></sec><sec id="s3_2_2"><title>3.2.2. The Synapse</title><p>The synapse is the point of connection between neurons, it allows to store the analog weight value W<sub>i</sub> and to multiply them by digital input signal X<sub>i</sub>.</p><p>The basic principle of a synapse is to perform the following two functions.</p><p>・ Modify connection strength.</p><p>・ Store weight.</p><p>In the SET inverter, the analog values of W<sub>i</sub> and X<sub>i</sub> are represented by the voltages V<sub>Wi</sub> and V<sub>Xi</sub>. <xref ref-type="fig" rid="fig3">Figure 3</xref> shows the SET inverter structure based synapse where V<sub>W</sub><sub>0</sub> is Weight value.</p><p>The digital input signals V<sub>X</sub><sub>0</sub> are set by the supervisor or by the output of another perceptron. The analog weights W<sub>i</sub> and the digital inputs signals X<sub>i</sub> are normalized between 0 and 1. In order to translate these digital values to voltages in the SET inverter structure, we simulate the transfer function using SIMON simulator with the parameters set as chosen in <xref ref-type="fig" rid="fig3">Figure 3</xref>.</p><p>The transfer function of the SET inverter based synapse is shown in <xref ref-type="fig" rid="fig4">Figure 4</xref>. V<sub>X</sub><sub>0</sub> is set to 0 and 6 mV in or- der to obtain this simulation result.</p><p>The transfer function is approximately linear when the input voltage V<sub>W</sub><sub>0</sub> evolves in the region 3.9 mV &lt; V<sub>W</sub><sub>0</sub> &lt; 5.8 mV. In this case the structure has an inversion operation, as a consequence the analog weight value W<sub>i</sub> = 1 is mapped to 3.9 mV and W<sub>i</sub> = 0 is mapped to 5.8 mV.</p><p>The translation <xref ref-type="table" rid="table1">Table 1</xref> shows the translation of parameter W<sub>i</sub> into voltage V<sub>Wi</sub>. Note that parameter X<sub>i</sub> can only yield 0 or 1 in other words V<sub>Xi</sub> can be 0 or 6 mV.</p></sec><sec id="s3_2_3"><title>3.2.3. The Neuron</title><p>The task of the neuron is to sum all weighted analog input signals X<sub>i</sub> and classify the summed signals by means of an activation function. The activation function is a limiting function and different activation functions are found, in fact, the most commonly used functions, are the hard-limiter and the sigmoid function [<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] .</p><p>The neuron should perform the following two functions:</p><fig id="fig3"  position="float"><label><xref ref-type="fig" rid="fig3">Figure 3</xref></label><caption><title> Synapse based on the SET inverter structure</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x8.png"/></fig><fig id="fig4"  position="float"><label><xref ref-type="fig" rid="fig4">Figure 4</xref></label><caption><title> Transfer function of the SET inverter based synapse</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x9.png"/></fig><table-wrap id="table1" ><label><xref ref-type="table" rid="table1">Table 1</xref></label><caption><title> Translate table W<sub>i</sub> on voltages V<sub>wi</sub></title></caption><table><tbody><thead><tr><th align="center" valign="middle" >W<sub>i</sub></th><th align="center" valign="middle" >0</th><th align="center" valign="middle" >0.1</th><th align="center" valign="middle" >0.2</th><th align="center" valign="middle" >0.3</th><th align="center" valign="middle" >0.4</th><th align="center" valign="middle" >0.5</th><th align="center" valign="middle" >0.6</th><th align="center" valign="middle" >0.7</th><th align="center" valign="middle" >0.8</th><th align="center" valign="middle" >0.9</th><th align="center" valign="middle" >1</th></tr></thead><tr><td align="center" valign="middle" >V<sub>wi</sub> (mV)</td><td align="center" valign="middle" >5.5</td><td align="center" valign="middle" >5.42</td><td align="center" valign="middle" >5.34</td><td align="center" valign="middle" >5.26</td><td align="center" valign="middle" >5.18</td><td align="center" valign="middle" >5.1</td><td align="center" valign="middle" >5.02</td><td align="center" valign="middle" >4.94</td><td align="center" valign="middle" >4.86</td><td align="center" valign="middle" >4.78</td><td align="center" valign="middle" >4.7</td></tr></tbody></table></table-wrap><p>・ Gather input signals.</p><p>・ Classify the results.</p><p>In <xref ref-type="fig" rid="fig5">Figure 5</xref>, a two-input neuron based on a SET inverter structure is shown. The coupling capacitors C<sub>C</sub><sub>0</sub> and C<sub>C</sub><sub>1</sub> perform the summation function and the activation function is carried out by the SET inverter structure [<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] .</p><p>The parameter set for the neuron is scaled with a factor 0.8 with respect to the parameter set of the synapse, in order to obtain output signals in the same voltage range.</p><p>Two important parameters can be distinguished. The first parameter is the SET junction capacitance value C<sub>T</sub>, this parameter describes the behavior of a SET circuit operating in the single-electron transport regime. The second parameter is the tunnel resistance R<sub>T</sub>, which is needed to describe the behavior of a SET circuit in the high current regime.</p><p>The neuron’s activation function is a hard-limiter function, as it is shown in <xref ref-type="fig" rid="fig6">Figure 6</xref> the threshold voltage, which is the input voltage V<sub>g</sub> for which the output voltage changes, is set to 3.3 mV approximately in this configuration. Which correspond to the threshold parameter S<sub>0</sub> = 0.55.</p></sec><sec id="s3_2_4"><title>3.2.4. Simulation of the Perceptron</title><p>The perceptron developed by Rosenblatt (1957) is an artificial neuron [<xref ref-type="bibr" rid="scirp.52378-ref15">15</xref>] -[<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] , whose activation function is a step function, it consists of multiple synapses and a neuron which is designed using the SET inverter structure. If the adder output is equal or greater than the threshold Z, then the neuron fires. If the adder output is smaller than the threshold Z then there is no neuron output.</p><p>In Equation (1), the output signal Y is expressed in terms of the input variables X<sub>i</sub> and W<sub>i</sub> for a general case:</p><disp-formula id="scirp.52378-formula286"><label>(1)</label><graphic position="anchor" xlink:href="http://html.scirp.org/file/3-4400125x10.png"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.52378-formula287"><graphic  xlink:href="http://html.scirp.org/file/3-4400125x11.png"  xlink:type="simple"/></disp-formula><p><xref ref-type="fig" rid="fig7">Figure 7</xref> shows a complete two-input perceptron, which is based on SET inverter structures. This perceptron was first published at the ICES2003 [<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] [<xref ref-type="bibr" rid="scirp.52378-ref18">18</xref>] and simulated using P-Spice. Therefore, in our work special</p><fig id="fig5"  position="float"><label><xref ref-type="fig" rid="fig5">Figure 5</xref></label><caption><title> Two-input SET inverter based neuron</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x12.png"/></fig><fig id="fig6"  position="float"><label><xref ref-type="fig" rid="fig6">Figure 6</xref></label><caption><title> Transfer function of the SET inverter structure based neuron</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x13.png"/></fig><fig id="fig7"  position="float"><label><xref ref-type="fig" rid="fig7">Figure 7</xref></label><caption><title> Two-input perceptron, based on SET inverter structures</title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x14.png"/></fig><p>measures had to be taken in order to simulate this circuit correctly in SIMON.</p><p>Before this perceptron can be simulated, the desired output has to be defined. In order to check if the output signal is the desired signal, a good test-set of input signals has to be created using MATLAB taking into account Equation (1). In <xref ref-type="table" rid="table2">Table 2</xref> a test-set of input signals and the desired output of a two-input perceptron is shown.</p><p>The threshold level S<sub>0</sub> is assumed to be 0.35 (which is an arbitrary choice). Then the operation of the perceptron is fully tested using SIMON simulator and results are presented in <xref ref-type="table" rid="table3">Table 3</xref>. Comparing with the results obtained with P-Spice in [<xref ref-type="bibr" rid="scirp.52378-ref17">17</xref>] the output signal V<sub>Y</sub> agrees with the desired output signals obtained from the test patterns of <xref ref-type="table" rid="table2">Table 2</xref>. However, these outputs are inverted with respect to the outputs obtained using MATLAB. In order to obtain a non-inverted output signal V<sub>Y</sub>, an extra inversion stage (identical to the neuron stage of <xref ref-type="fig" rid="fig5">Figure 5</xref>) can be added to the perceptron of <xref ref-type="fig" rid="fig7">Figure 7</xref>.</p><p>A very interesting idea that brings multiple benefits to nanotechnology is to have a multi-level memory to a single electron [<xref ref-type="bibr" rid="scirp.52378-ref19">19</xref>] . In this context, we have tried to highlight the discrete of the charge of the electron node memory N<sub>1</sub>.</p><p>The shapes of control signals (the weight V<sub>Wi</sub> &amp; the input V<sub>Xi</sub>) are very important to observe the charge evolution “Q” versus time. We have considered in this work that the architecture works in the same way as a memory.</p><p><xref ref-type="fig" rid="fig8">Figure 8</xref> shows the shape of the charge Q(t) in the island which allows us to count the number of electrons stored in the memory node (node 1) and to know the instant t when writing or erasing.</p><p>At first, the input voltage V<sub>X</sub><sub>1</sub> is zero and there is no electron at the quantum dot N<sub>1</sub>. By applying a negative input voltage V<sub>X</sub><sub>1</sub> = −6 mV, a certain number of electrons are stored inside the quantum dot and no more electrons will be transported out of there. Because of the Coulomb blockade effect and the potential barrier, the electron cannot flow back to the ground.</p><p>This result shows that the number of electrons in the memory node (the red curve for V<sub>w</sub><sub>1</sub> = 9 mV) after the charging increases when the input voltages increase until it reaches 5 electrons.</p><p>After returning V<sub>X</sub><sub>1</sub> to zero electrons are not lost, this property provides a great potential for the network to be used in the design of nonvolatile RAMs.</p><p>The weight V<sub>W</sub><sub>1</sub> plays the role of parameters which are adjusted at the training process. As we can see in <xref ref-type="fig" rid="fig8">Figure 8</xref> the number of charge stored in node N<sub>1</sub> depends of the value of V<sub>W</sub><sub>1</sub>. When the value of V<sub>W</sub><sub>1</sub> is equal to 9 mV five electrons are stored in the node N<sub>1</sub> but when we decrease the value of the weight the number of the writing electron increase until it reach ≈19 electron for V<sub>w</sub><sub>1</sub> = 1 mV. It can be seen that this memory can be con-</p><table-wrap id="table2" ><label><xref ref-type="table" rid="table2">Table 2</xref></label><caption><title> Test-set of input signals and the desired output</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >X<sub>0</sub></th><th align="center" valign="middle" >X<sub>1</sub></th><th align="center" valign="middle" >W<sub>0</sub></th><th align="center" valign="middle" >W<sub>1</sub></th><th align="center" valign="middle" >Y</th></tr></thead><tr><td align="center" valign="middle" >0</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0</td></tr><tr><td align="center" valign="middle" >0</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.3</td><td align="center" valign="middle" >0.8</td><td align="center" valign="middle" >1</td></tr><tr><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0.3</td><td align="center" valign="middle" >0.8</td><td align="center" valign="middle" >0</td></tr><tr><td align="center" valign="middle" >1</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.4</td><td align="center" valign="middle" >0.4</td><td align="center" valign="middle" >1</td></tr></tbody></table></table-wrap><table-wrap id="table3" ><label><xref ref-type="table" rid="table3">Table 3</xref></label><caption><title> A test-set of input signals</title></caption><table><tbody><thead><tr><th align="center" valign="middle" >V<sub>X</sub><sub>0</sub></th><th align="center" valign="middle" >V<sub>W</sub><sub>0</sub></th><th align="center" valign="middle" >V<sub>X</sub><sub>1</sub></th><th align="center" valign="middle" >V<sub>W</sub><sub>1</sub></th><th align="center" valign="middle" >P-Spice Simulation V<sub>Y</sub></th><th align="center" valign="middle" >SIMON Simulation V<sub>Y</sub></th></tr></thead><tr><td align="center" valign="middle" >0 mV</td><td align="center" valign="middle" >4.7 mV</td><td align="center" valign="middle" >0 mV</td><td align="center" valign="middle" >4.7 mV</td><td align="center" valign="middle" >6.13 mV</td><td align="center" valign="middle" >5.07 mV</td></tr><tr><td align="center" valign="middle" >0</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0</td></tr><tr><td align="center" valign="middle" >0 mV</td><td align="center" valign="middle" >5.26 mV</td><td align="center" valign="middle" >6 mV</td><td align="center" valign="middle" >4.86 mV</td><td align="center" valign="middle" >148 &#181;V</td><td align="center" valign="middle" >150 &#181;V</td></tr><tr><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0.3</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.8</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >1</td></tr><tr><td align="center" valign="middle" >6 mV</td><td align="center" valign="middle" >5.26 mV</td><td align="center" valign="middle" >0 mV</td><td align="center" valign="middle" >4.86 mV</td><td align="center" valign="middle" >6.01mV</td><td align="center" valign="middle" >4.9 mV</td></tr><tr><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.3</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0.8</td><td align="center" valign="middle" >0</td><td align="center" valign="middle" >0</td></tr><tr><td align="center" valign="middle" >6 mV</td><td align="center" valign="middle" >5.18 mV</td><td align="center" valign="middle" >6 mV</td><td align="center" valign="middle" >5.18 mV</td><td align="center" valign="middle" >198 &#181;V</td><td align="center" valign="middle" >196 &#181;V</td></tr><tr><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.4</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >0.4</td><td align="center" valign="middle" >1</td><td align="center" valign="middle" >1</td></tr></tbody></table></table-wrap><fig id="fig8"  position="float"><label><xref ref-type="fig" rid="fig8">Figure 8</xref></label><caption><title> Simulation results of the charge and influence of the value of the weight V<sub>W</sub><sub>1</sub> and the input V<sub>X</sub><sub>1</sub></title></caption><graphic mimetype="image"   position="float"  xlink:type="simple"  xlink:href="http://html.scirp.org/file/3-4400125x15.png"/></fig><p>sidered as a smart memory because we can manipulate the number of charges stored in the memory by a learning algorithm.</p><p>This learning algorithm is used to train the network for a particular purpose, in our case achieve extraordinary storage densities at an extremely low power consumption.</p></sec></sec></sec><sec id="s4"><title>4. Conclusions</title><p>In this paper a complete two-input perceptron, which is based on SET inverter structures, was presented, discussed and simulated using SIMON simulator and MATLAB. It was also proved that this architecture works as a random access memory. Two features are important in this memory: the first is its low-power consumption and the second is its dependence of the charge stored to the variation of the weight.</p><p>The advantages of such Monte Carlo simulator “SIMON” which is designed to solve capacitance systems that contain tunnel junctions are the possibility to investigate the evolution of charge versus time by the main of simulation process based on orthodox theory.</p><p>This work opens the prospect of smart memory in which one can manipulate the number of bits stored by the mean of learning algorithm.</p></sec><sec id="s5"><title>NOTES</title></sec></body><back><ref-list><title>References</title><ref id="scirp.52378-ref1"><label>1</label><mixed-citation publication-type="other" xlink:type="simple">Beaumont, A. (2009) Room Temperature Single-Electron Transistor Featuring Gate-Enhanced On-State Current. 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