<?xml version="1.0" encoding="UTF-8"?><!DOCTYPE article  PUBLIC "-//NLM//DTD Journal Publishing DTD v3.0 20080202//EN" "http://dtd.nlm.nih.gov/publishing/3.0/journalpublishing3.dtd"><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" dtd-version="3.0" xml:lang="en" article-type="research article"><front><journal-meta><journal-id journal-id-type="publisher-id">CS</journal-id><journal-title-group><journal-title>Circuits and Systems</journal-title></journal-title-group><issn pub-type="epub">2153-1285</issn><publisher><publisher-name>Scientific Research Publishing</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.4236/cs.2014.51001</article-id><article-id pub-id-type="publisher-id">CS-41836</article-id><article-categories><subj-group subj-group-type="heading"><subject>Articles</subject></subj-group><subj-group subj-group-type="Discipline-v2"><subject>Computer Science&amp;Communications</subject><subject> Engineering</subject><subject> Physics&amp;Mathematics</subject></subj-group></article-categories><title-group><article-title>
 
 
  Dual DVCC Based Voltage-Mode Digitally Programmable Biquadratic Filter
 
</article-title></title-group><contrib-group><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>le</surname><given-names>Imran</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref><xref ref-type="corresp" rid="cor1"><sup>*</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Deepesh</surname><given-names>Arora</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib><contrib contrib-type="author" xlink:type="simple"><name name-style="western"><surname>Rishabh</surname><given-names>Kumar</given-names></name><xref ref-type="aff" rid="aff1"><sup>1</sup></xref></contrib></contrib-group><aff id="aff1"><addr-line>Department of Electronics Engineering, Aligarh Muslim University, Aligarh, India</addr-line></aff><author-notes><corresp id="cor1">* E-mail:<email>ale.imran23@gmail.com(LI)</email>;</corresp></author-notes><pub-date pub-type="epub"><day>10</day><month>01</month><year>2014</year></pub-date><volume>05</volume><issue>01</issue><fpage>1</fpage><lpage>6</lpage><history><date date-type="received"><day>November</day>	<month>8,</month>	<year>2013</year></date><date date-type="rev-recd"><day>December</day>	<month>8,</month>	<year>2013</year>	</date><date date-type="accepted"><day>December</day>	<month>15,</month>	<year>2013</year></date></history><permissions><copyright-statement>&#169; Copyright  2014 by authors and Scientific Research Publishing Inc. </copyright-statement><copyright-year>2014</copyright-year><license><license-p>This work is licensed under the Creative Commons Attribution International License (CC BY). http://creativecommons.org/licenses/by/4.0/</license-p></license></permissions><abstract><p>
 
 
   The recent advances in IC technology have led to the trend of designing hybrid systems to benefit both analog and the digital domain. Among analog circuits, multifunctional filter along with multiphase oscillator constitutes a building block of critical importance. In this paper, a digitally reconfigurable multi-input-multi-output voltage mode multifunctional biquadratic filter has been presented. The circuit comprises of two differential voltage current conveyors (DVCCs), two grounded capacitors and two floating resistors. The digital controllability is incorporated using a current-summing network (CSN). Tunability of quality factor is achieved by the use of a 3-bit digital control word while keeping the resonant frequency constant. PSPICE simulations using TSMC 0.25 μm CMOS technology have been performed to validate the theoretically predicted results. 
 
</p></abstract><kwd-group><kwd>Voltage-Mode; Differential Voltage Current Conveyor (DVCC); Multifunctional Filter; Digitally Controlled Circuits; Current Summing Network</kwd></kwd-group></article-meta></front><body><sec id="s1"><title>1. Introduction</title><p>Voltage-mode active filters exhibiting high input impedance are of great interest as a number of cells can be easily cascaded for the realization of the higher order filters. The significance of the digitally controlled blocks can be appreciated in situations where a filter needs to be designed for the given filter parameters, i.e. its cut-off frequency and quality factor. According to the given specifications and the transfer function of the circuit, the values of passive elements are selected to meet the requirements. If any parameter of the circuit is altered, the circuit needs to be designed again and again which is a tedious task. This problem can be alleviated by employing digitally controlled circuits which provide the flexibility to design the circuit for certain discrete values of the parameters instead of the single fixed value in conventional filters. The number of values will depend on the minimum resolution of the control word.</p><p>There have been countless applications that involve realization of active transfer functions employing current conveyors, which have received a considerable amount of research attention [<xref ref-type="bibr" rid="scirp.41836-ref1">1</xref>]. The continuous-time analog filter is a ubiquitous circuit component in a vast variety of applications including, but not limited to, noise rejection &amp; signal separation in industrial and measurement circuits, feedback of phase &amp; amplitude control in servo loops, smoothing of digitally generated analog signals, audio signal shaping &amp; sound enhancement, and channel separation &amp; signal enhancement in communication electronics.</p><p>Among the several variations of current conveyor, the most successful type is second-generation current conveyor (CCII) introduced by Sedra and Smith [<xref ref-type="bibr" rid="scirp.41836-ref2">2</xref>]. However, when it comes to applications demanding differential or floating inputs like impedance converter circuits and current-mode instrumentation amplifiers, which also require two high input impedance terminals, a single CCII block is no more sufficient. Moreover, these applications employ floating elements to minimize the number of used CCII blocks [<xref ref-type="bibr" rid="scirp.41836-ref3">3</xref>]. Considering the obvious drawbacks of CCIIs, a new building block called differential voltage current conveyor (DVCC) building block was introduced [<xref ref-type="bibr" rid="scirp.41836-ref4">4</xref>]. DVCC is a widely used versatile analog building block whose applications exist in the literature [5-9]. In this paper, the Q-factor of multifunctional filter proposed by Chen et al. [<xref ref-type="bibr" rid="scirp.41836-ref10">10</xref>] is digitally tuned with the help of a Current Summing Network (CSN). The paper is organized as follows. Section 2 presents a brief description about DVCCs. In Section 3, the circuit proposed in [<xref ref-type="bibr" rid="scirp.41836-ref10">10</xref>] by Chen et al. which has been digitally controlled is discussed, followed by Section 4, which gives a brief idea about the operation of the Digitally-Controlled DVCC (DC-DVCC) using CSN. Section 5 deals with the details of the proposed digitally controlled multifunctional biquadratic filter along with its design. Finally, the results are discussed in Section 6, followed by the concluding remarks appearing in Section 7.</p></sec><sec id="s2"><title>2. Differential Voltage Current Conveyor</title><p>The DVCC is a five-port, widely used analog building block defined by the following matrix equation [<xref ref-type="bibr" rid="scirp.41836-ref4">4</xref>].</p><disp-formula id="scirp.41836-formula12591"><label>(1)</label><graphic position="anchor" xlink:href="1-7600301\8fbcce39-5a62-4f8f-943f-40d1008c8e61.jpg"  xlink:type="simple"/></disp-formula><p>The block level implementation of an ideal DVCC is shown in  <xref ref-type="fig" rid="fig1">Figure 1</xref>, whereas its CMOS transistor realization [<xref ref-type="bibr" rid="scirp.41836-ref4">4</xref>] used in this paper for implementing multifunctional filter is depicted in <xref ref-type="fig" rid="fig2">Figure 2</xref>.</p></sec><sec id="s3"><title>3. CMOS Implementation of DVCC Filter</title><p>The implemented voltage mode multifunctional filter [<xref ref-type="bibr" rid="scirp.41836-ref10">10</xref>] is shown in  <xref ref-type="fig" rid="fig3">Figure 3</xref>. Routine analysis of the circuit, yields the following voltage transfer functions of the voltage-mode second order low-pass, high-pass, band-pass and band-reject filters given respectively by Equations (2)-(5).</p><p>If V<sub>i</sub><sub>1</sub> = V<sub>i</sub><sub>3</sub> = V<sub>in</sub>(the input voltage signal) and V<sub>i</sub><sub>2</sub> = 0, then</p><disp-formula id="scirp.41836-formula12592"><label>(2)</label><graphic position="anchor" xlink:href="1-7600301\230c5f6f-a07b-49bc-bc9b-3aab47bd1b50.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12593"><label>(3)</label><graphic position="anchor" xlink:href="1-7600301\aa8904ff-e589-4d21-96b6-5e465b896487.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12594"><label>(4)</label><graphic position="anchor" xlink:href="1-7600301\dc5a650a-4013-4258-8821-f711923af5f0.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12595"><label>(5)</label><graphic position="anchor" xlink:href="1-7600301\f094cba3-32fe-4b3c-b190-4e9ffd6b503b.jpg"  xlink:type="simple"/></disp-formula><p>where the quality factor, Q and theresonant angular frequency, <img src="1-7600301\3dd57ce6-5485-4f63-9b61-5032854650d2.jpg" />are given by:</p><disp-formula id="scirp.41836-formula12596"><label>(6)</label><graphic position="anchor" xlink:href="1-7600301\2587ed05-54ff-4a3a-a0ff-a63ca198b999.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12597"><label>(7)</label><graphic position="anchor" xlink:href="1-7600301\d771380f-014f-49bc-ad66-c9e5028de908.jpg"  xlink:type="simple"/></disp-formula><p>It is to be noted that the low-pass, high-pass, band-pass and band reject functions can be simultaneously realized</p><p>without changing the circuit configuration. The multifunctional filter has been designed for a cut-off frequency of 1 MHz with C<sub>1</sub> = C<sub>2</sub> = 15.9 pF, R<sub>1</sub> = R<sub>2</sub> = 10 kΩ. The responses of the multifunctional filter for the above given design is shown in  <xref ref-type="fig" rid="fig4">Figure 4</xref>. The circuit has been simulated with the help of 0.25 &#181;m technology. TSMC process parameters using PSPICE package have been used for carrying out the analysis and the results are in conformity with the theoretical analysis.</p></sec><sec id="s4"><title>4. Digitally Programmable DVCC</title><p>For introducing the digital control in the multifunctional filter we have used Digitally Controllable DVCC (DCDVCC), shown in <xref ref-type="fig" rid="fig5">Figure 5</xref>. It’s basically a 5-terminal analog building block defined by the following relations:</p><disp-formula id="scirp.41836-formula12598"><label>(8)</label><graphic position="anchor" xlink:href="1-7600301\d6b8aa70-2ad8-49e0-8c75-8fc3e5350e73.jpg"  xlink:type="simple"/></disp-formula><p>As defined by the characteristics equations in Equation (8), the voltage on the X-terminal realizes the difference of potentials on terminals Y1 and Y2. Furthermore, the current injected at the X-terminal is replicated by a factor of k to the Z-terminals. For the Z+ and Z− terminals, the conveyed current flows in the same and opposite direction respectively, to the current flowing in the X terminal [<xref ref-type="bibr" rid="scirp.41836-ref11">11</xref>].</p><p>For digitally reconfiguring the DVCC and obtaining a digitally controlled DVCC (DC-DVCC), a Current Summing Network (CSN) has been employed at the Zand Z+ terminal for controlling the current transfer gain parameter k. The gain parameter k can be varied from 1 to (2<sup>n</sup> – 1), where n represents the number of transistor arrays. The modified circuit of DVCC i.e. Digitally Controlled-DVCC employing a CSN is shown in <xref ref-type="fig" rid="fig6">Figure 6</xref> [<xref ref-type="bibr" rid="scirp.41836-ref11">11</xref>]. The CSN consists of n transistor pairs, the aspect ratios of whose NMOS and PMOS transistors are given by:</p><disp-formula id="scirp.41836-formula12599"><label>(9)</label><graphic position="anchor" xlink:href="1-7600301\c92b9dda-79d8-4387-b0e8-30d5d46d71bb.jpg"  xlink:type="simple"/></disp-formula><p>Furthermore, the current at the Z terminal, assumed to be flowing out of the DC-DVCC, can be expressed by:</p><disp-formula id="scirp.41836-formula12600"><label>(10)</label><graphic position="anchor" xlink:href="1-7600301\5fbd63ef-a86f-43f1-bb7f-bd28c87d55d0.jpg"  xlink:type="simple"/></disp-formula><p>Therefore, the proposed DC-DVCC provides a current transfer gain, k equal to:</p><disp-formula id="scirp.41836-formula12601"><label>(11)</label><graphic position="anchor" xlink:href="1-7600301\8eb9a7ad-535e-455d-bdbd-a813e04e5adf.jpg"  xlink:type="simple"/></disp-formula><p>where d<sub>i</sub> represents the bits applied to the i-th branch in the CSN. Now depending upon its value, whether it’s a logic 1 or logic 0, the current is enabled or disabled to flow in that particular branch [13-15].</p></sec><sec id="s5"><title>5. Digitally Programmable Multifunctional Filter</title><p>In this section, the voltage-mode multifunctional biquadratic filter of  <xref ref-type="fig" rid="fig3">Figure 3</xref> is digitally programmed by using a Current Summing Network (CSN) with electronic control of quality factor as shown in <xref ref-type="fig" rid="fig7">Figure 7</xref>. The introduc-</p><p>tion of the digital control module, comprising of CSN leads to a significant change in the expression of the transfer function of multifunctional filter. The expression for the digitally programmable filter functions can now be expressed as:</p><disp-formula id="scirp.41836-formula12602"><label>(12)</label><graphic position="anchor" xlink:href="1-7600301\05d944a6-44fc-4ffe-a644-5e46a5407a2e.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12603"><label>(13)</label><graphic position="anchor" xlink:href="1-7600301\546eab2c-c922-4746-bb43-9b3c975e4fe0.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12604"><label>(14)</label><graphic position="anchor" xlink:href="1-7600301\ab8d6f21-5990-4f8d-b166-f110d32a492d.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12605"><label>(15)</label><graphic position="anchor" xlink:href="1-7600301\49e99581-29fa-4aff-b322-acf8e507e43a.jpg"  xlink:type="simple"/></disp-formula><p>The resonant angular frequency, ω<sub>o</sub> and the quality factor, Q, are given by:</p><disp-formula id="scirp.41836-formula12606"><label>(16)</label><graphic position="anchor" xlink:href="1-7600301\30ef2c16-2e90-4900-91a5-869750f09e03.jpg"  xlink:type="simple"/></disp-formula><disp-formula id="scirp.41836-formula12607"><label>(17)</label><graphic position="anchor" xlink:href="1-7600301\009915ad-f984-4fab-985c-da8bd35d8e73.jpg"  xlink:type="simple"/></disp-formula><p>where</p><disp-formula id="scirp.41836-formula12608"><label>(18)</label><graphic position="anchor" xlink:href="1-7600301\d424a401-e5e2-49fa-a005-5c9596c00937.jpg"  xlink:type="simple"/></disp-formula><p>where d<sub>i</sub> represents the bits applied to the i-th branch in the Current Summing Network (CSN).</p><p>It can be seen from Equations (16) and (17) that only the expression of quality factor is varying with control word, whereas the cut-off frequency is independent of it. Since quality factor indicates the selectivity characteristic of a filter and it’s significance is more with the band pass, as compared to the other filters, so for this digitally controlled circuit focus will be only on the response of band pass filter.Moreover, the circuit utilizes grounded capacitors for the filter’s realization, which makes it suitable for integrated circuit implementation.</p></sec><sec id="s6"><title>6. Simulation Results</title><p>The proposed digitally controllable multifunctional voltage mode filter has been simulated and all the realizations are designed and verified using PSPICE simulation tool with good results in support of the theory to ensure that the expected functionality is indeed obtained. The CMOS implementation of Digitally Programmable DVCC is shown in <xref ref-type="fig" rid="fig7">Figure 7</xref> and it employs TSMC 0.25 μm CMOS technology process parameters. Figures 8-10 show resultant waveforms of Band Pass Filter for control word [0 0 1], [1 0 1] and [1 1 1] respectively by setting the associated bits to either logic1 or logic 0, where each bit corresponds to a particular binary weight. Furthermore, Figures 11 and 12 illustrate the variation in quality factor and resonant frequency with different control words. Theoretically, the quality factor of digitally controlled band pass filter has a linear relationship with control word, as indicated by Equation (17) and the same is verified with the help of PSPICE simulations, summarized in the form of a graph, shown in  <xref ref-type="fig" rid="fig1">Figure 1</xref>0. The quality factor of the band pass filter is found to vary from 1.01 to 6.33 and resonant frequency is almost constant all</p><p>the plots are in excellent mathematical conformity with the transfer functions given in equations. The slight decrease in the resonant frequency is because of the nonideal effects. The performance of the DVCC generally deviates from the ideal behavior since, the voltage and current conveying actions are not exact, therefore leading to slight degradation in performance of the circuit realized using these active elements. In order to account for these non ideal effects, the parameters of α and β are introduced, where α accounts for current transfer gains and β accounts for voltage transfer gains. These transfer gains differ from unity, by the voltage and current tracking errors of the DVCC.</p><p>The Digitally Programmed Multifunctional filter can be controlled by a 3-bit control word that can be varied from 1 to 8. However in order to achieve more variation in the Q-factor of the circuit, the digital control word could be increased by adding more transistor pairs in the current summing network of digitally controlled DVCC.</p></sec><sec id="s7"><title>7. Conclusion</title><p>In this paper, a novel digitally controllable voltage-mode universal biquadratic filter based on DVCC was presented. Digital tuning has been achieved by the variation of 3-bit digital control word. PSPICE simulations were carried out to ascertain the working of the proposed filters and the results were found to match with the theoretical results.</p></sec><sec id="s8"><title>REFERENCES</title></sec></body><back><ref-list><title>References</title><ref id="scirp.41836-ref1"><label>1</label><mixed-citation publication-type="other" xlink:type="simple">B. Wilson, “Recent Developments in Current Conveyors and Current-Mode Circuits,” IEE Proceedings Pt. G, Vol. 137, 1990, pp. 63-77.</mixed-citation></ref><ref id="scirp.41836-ref2"><label>2</label><mixed-citation publication-type="other" xlink:type="simple">A. Sedra and K. C. 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