In logic synthesis, it is widely recognized that particular categories of logic functions display distinct forms of symmetries [8]. These symmetries are present in various forms, including symmetries among distinct functions when negated, symmetries in a function regarding the negation of its variables, and symmetries in a function concerning the permutation of its variables. A technique to define a symmetry that could be present in a logic function is executed by employing the concept of symmetry indices. A symmetry index Sⁱ specifies a K-map cell that counts the value of “1” in the specified minterm for number of times equal toi.

Definition 1. A single index symmetric function, denoted as S^k(x₁,x₂, ∙∙∙, x_n) has value of “1” when exactly k of its n inputs is equal to “1” and exactly (n − k) of its remaining inputs are “0”.

Definition 2. Elementary symmetric functions of n variables are:

Thus, for a Boolean function of three variables, one obtains the following set of symmetry indices { S 0 , S 1 , S 2 , S 3 } such that S 0 = { a ¯ b ¯ c ¯ } , S 1 = { a ¯ b ¯ c , a ¯ b c ¯ , a b ¯ c ¯ } , S 2 = { a ¯ b c , a b c ¯ , a b ¯ c } and S 3 = { a b c } . It has been shown that an arbitrary n-variable symmetric function can be uniquely represented by the elementary symmetric functions { S 0 , S 1 , ⋯ , S n } as f = ∑ i ∈ A S i = S A .

It has been demonstrated that a non-symmetric function can be made symmetric by duplicating variables [8]. This variable duplication method alters the values of cells in the related K-map (that cause the function to be nonsymmetric) into don’t cares and thus rendering the function symmetric [8]. For example, it can be observed that although differing values may arise for a symmetry index in minterms in a K-map, resulting in a non-symmetric function, consistent values are generated for that same non-symmetric function through the technique of variable repetition.

As mentioned earlier, different uses of symmetry indices for the creation of logic functions have been demonstrated before [8]. This encompasses symmetric networks, Akers arrays, and lattice grids, along with various other implementations. The idea of lattice grids for switching functions typically includes three elements: 1) the expansion of a function which is linked to the root in the lattice producing multiple successor nodes of the expanded node, 2) the merging of several nodes into one node which is the inverse of the expansion operation, and 3) a regular geometry to which the nodes are assigned. Figure 4(a) illustrates a four-variable (i.e., four-level) two-dimensional lattice grid featuring inner nodes as two-to-one multiplexers, while Figure 4(b) and Figure 4(c) depict the connection between Figure 4(a) and symmetry indices [8]. Figure 4 illustrates that conventional lattice grids demonstrate a strong connection with symmetry indices, which denote the collections of all potential paths from leaves to the root of the respective lattice grid. It is also observed that every internal node in Figure 4(a) represents a Shannon node that is effectively realized as a two-to-one multiplexer directing its output in two ways, where different types of expansion nodes can also be generated as well that yield alternative representation forms of lattice grids [8].

Figure 4.The connection between a two-dimensional lattice grid and symmetry indices: (a) a two-dimensional lattice grid for a four-variable functionF, (b) groups of binary symmetry indices, and (c) the related K-map representation of the binary symmetry indices.

It has been demonstrated, as noted earlier, that any non-symmetric function can be symmetrized by duplicating some of its variables. Consequently, because each variable corresponds to one level in the lattice grid, duplicating variables results in repeated levels within the lattice grid. Typically, three primary factors determine the size of a lattice grid that implements non-symmetric functions: 1) types of expansions utilized at the internal nodes, 2) arrangement of variables upon which functions are expanded at every level of the lattice, and 3) selection of repeated variables [8]. As a result, several optimization techniques have been discussed for the best selection of these three factors stated earlier to reduce the size of the lattice grid for implementing the associated logic functions.

It is shown that to maintain the standard realization of expansions over n radix, it is adequate to connect n nodes in n-dimensional space to achieve the appropriate lattice grids [8]. For example, in the binary case, connecting two nodes is enough to create two-dimensional lattice grids, while in the ternary case, linking three nodes is adequate to generate the associated three-dimensional lattice grids. Similar to the binary scenario, completely symmetric ternary functions don’t require duplicate variables for their implementation in three-dimensional lattice grids. Figure 5 illustrates the connection between three-dimensional lattice grids and ternary symmetry indices, where ternary symmetry indices consist of all potential paths from the leaves to the root of a three-dimensional lattice grid [8]. Observe that every internal node in Figure 5 represents a ternary Shannon node functioning as a three-to-one multiplexer with its output directed in three different ways.

As demonstrated earlier, implementing non-symmetric functions with standard lattice grids requires the technique of variable repetition [8]. Often, variables must be repeated so frequently that it leads to a significantly large lattice grid, which may not conform to the designated area or the defined volume in the context of three-dimensional lattice grids [14]. Conversely, one can adjust the relevant interconnections among the internal nodes of the lattice grid through optimization techniques to ensure that the grid conforms to the designated spatial arrangement. However, this re-routing procedure will result in the interconnects among lattice nodes having varying lengths, thereby depriving the lattice grid of one of its key attributes of regularity where all interconnects should be of uniform length.

Figure 5.Three-dimensional lattice grid for three-variable ternary functions: (a) lattice grid, (b) ternary symmetry indices, and (c) ternary natural-coded representation for the ternary symmetry indices.

The binary structure of families of canonical forms and their associated decision trees and diagrams relies on three essential functional expansions of Shannon, positive Davio and negative Davio expansions [8]. The basic Shannon expansion is presented in Equation (1):

where f 0 ( x 1 , x 2 , ⋯ , x n ) = f ( 0 , x 2 , ⋯ , x n ) = f 0 is the negative cofactor of variable x 1 and f 1 ( x 1 , x 2 , ⋯ , x n ) = f ( 1 , x 2 , ⋯ , x n ) = f 1 is the positive cofactor of variable x 1 . All operations in Equation (1) are performed using Boolean algebra where ⊕ is the Boolean XOR.

Due to the fact that Galois field (GF) has demonstrated multiple advantages in various applications like testing, communications and signal processing, the three-dimensional lattice grids will be carried out on the relevant GF. For instance, addition and multiplication operations in radix three GF are detailed in Table 1(a) and Table 1(b), respectively.

Table 1. Third radix Galois field: (a) addition and (b) multiplication.

A literal is a function of a single variable. The important 1-Reduced Post literal (1-RPL) is defined as:

For example, 0 x , 1 x , and 2 x are the zero, first and second polarities of the 1-RPL, respectively. Also, the ternary shifts of variable x are defined as x with no shift, x ′ with one shift and x ″ with two shifts (i.e., x = x + 0 , x ′ = x + 1 , and x ″ = x + 2 , respectively) and x ∈ { 0 , 1 , 2 } , where ternary 1-RPL will be used to construct the corresponding three-dimensional lattice grids by controlling the propagation of sub-functions in three-dimensions [8].

As mentioned earlier, the idea of regular lattice grids for switching functions encompasses three elements: 1) expanding a function that relates to the root (initial node) in the lattice resulting in multiple successor nodes from the expanded node, 2) joining several nodes at a level of a decision tree into one node, and 3) regular geometry to which the nodes are assigned. For instance, although the implementation of Boolean non-symmetric functions in Akers arrays necessitates an exponential increase in variable repetition in the worst-case scenario, the implementation of these functions in regular lattice grids involves a linear increase in variable repetition [8]. Thus, for most practical benchmarks, there is no need to repeat the variables of non-symmetric functions excessively to implement such functions in regular lattice grids.

Definition 3.The function produced by connecting two nodes (sub-functions) in a lattice grid is referred to as the joined function. The function produced in nodes apart from the joining nodes, to maintain the functionality within the lattice grid, is referred to as the correction function.

Figure 6 demonstrates, for instance, the structure of a four-neighbor regular lattice grid and the joining operations applied to the nodes, where each node possesses two inputs and two outputs (i.e., four neighbors). The design of the lattice grid shown in Figure 6 employs one potential method of top-to-bottom expansion and left-to-right joining.

Figure 6. Two-dimensional four-neighbor lattice grids: (a) general lattice grid where v_i ∈ {0, 1} and (b) Shannon lattice grid where internal nodes are 2-to-1 multiplexers.

Observe that the lattice grids depicted in Figure 6 maintain the functionality of their respective sub-functions fand g. For example, as shown in Figure 6(b), the complemented variable a’ cancels variable a when cofactors are propagated from lower levels to upper levels or the other way around, without requiring correction functions to maintain the output functionality of the respective lattice grid. This straightforward observation may not directly be observable in other types of lattice grids because correction functions can be needed to negate the impact of the newly added nodes to maintain the functionality of the new lattice grids. As stated previously, it has been demonstrated that any non-symmetric function can become symmetric through variable repetition, and a completely symmetric function can be derived from any arbitrary non-symmetric function by repeating its variables. As a result, standard lattice grids and function symmetry are closely interconnected [8]. Example 1 illustrates this extremely close connection. It can be noted that to depict the non-symmetric function from Example 1 in the two-dimensional regular lattice grid, variable a appears two times, with nodes in Figure 7 being Shannon nodes that function as two-input one-output multiplexers directing their output in two directions, and variables {a, b} serve as control signals.

Example 1. For the binary non-symmetric implication function F = a' + b, Figure 7 illustrates the relationship between the K-map with non-conflicting symmetry indices Sⁱ and the two-dimensional regular lattice grid with non-conflicting leaves, which is achieved by repeating variable a twice in the two-dimensional regular lattice grid. All internal nodes in Figure 7 are two-to-one multiplexers where multiplying each leaf value from left to right with every possible bottom-up path (from leaves to root) and summing them using Boolean algebra produces the desired functionF at the root.

Figure 7. Employing symmetry indices: (a) non-symmetric implication Boolean function, (b) symmetrization through the repetition of variable a, (c) two-dimensional regular lattice aligned with Figure 7(a) featuring a conflicting leaf in a dark box, and (d) two-dimensional regular lattice corresponding to Figure 7(b) with non-conflicting leaves.

Proving that repetition of variables will conclude during the symmetrization of non-symmetric functions is essential. A straightforward proof is as follows: the count of variables for completely symmetric functions matches the count of levels in the lattice grid since variable repetition is unnecessary. It is established that the repetition of variables symmetrizes every non-symmetric function, which consequently leads to a specific number of levels in the associated lattice grid, resulting in a certain number of total variables (both repeated and non-repeated) that conclude the symmetrization process.

The findings from this Subsection will be applied in the subsequent Subsection 3.3 to ternary logic, transitioning from two-dimensional planar space to three-dimensional solid space.

Many-valued logic holds a significant position between two-valued logic (like Boolean logic) and infinite-valued logic (like fuzzy logic) with numerous applications in contemporary communications and digital computing [8]. For instance, the idea of two-dimensional regular lattice grids that was mentioned in Subsection 3.2 can be expanded to encompass three-dimensional lattice grids [8]. As the most intuitive approach to conceptualize a binary lattice grid is through a four-neighbor two-dimensional lattice like that illustrated in Figure 6(a), this concept can be expanded to three-dimensional space for ternary lattice grids, where these signify six-neighbor three-dimensional lattices [8].

While regular lattice grids can be constructed in three-dimensional space for the third Galois radix while preserving their complete regularity, they cannot be realized for radices greater than three; higher-dimensional lattice grids can be implemented in three-dimensional space but at the cost of forfeiting complete regularity. The ternary circuit realization yields a regular circuit in three dimensions, characterized by uniform interconnects of equal length; however, constructing higher-dimensional lattice grids within lower-dimensional space can sacrifice regularity, resulting in lattice grids that lack full regularity because of the varying lengths of interconnects connecting nodes.

As a geometric idea, and as mentioned before, lattice grids can be formed for two, three, four or any greater Galois bases. Nonetheless, since our physical environment is three-dimensional, lattice grids can only be constructed within a solid space exclusively for a) radix two in two dimensions or b) radix three in three dimensions. It is noteworthy that the regularity which is seen in lattice grids for a) binary and ternary functions will not be apparent for quaternary or higher radix functions. Consequently, ternary lattice grids occupy a distinctive position as extremely organized frameworks that optimize the use of three-dimensional space [8][12]-[14]. As illustrated in Example 1, each dimension in a three-dimensional lattice grid relates to a value of the associated control variable where a value of zero for the control variable spreads along the x-axis, a value of one spreads along the y-axis, and a value of two spreads along the z-axis.

Example 2. This example illustrates the implementation of a ternary 3-digit full adder utilizing three-dimensional regular lattice grids. In this example, three-valued addition is executed using the modsum operator from Table 1(a), which demonstrated the modsum addition applied to ternary inputs. The ternary maps depicted in Figure 8 illustrate the ternary Sum F₁ and the ternary output Carry F₂ functions where: ternary Sum F₁ = ⁰a⁰b¹c + ⁰a¹b⁰c + 2∙⁰a¹b¹c + 2∙⁰a²b⁰c + ¹a⁰b⁰c + 2∙¹a⁰b¹c + 2∙¹a¹b⁰c + ¹a²b¹c + 2∙²a⁰b⁰c + ²a¹b¹c + ²a²b⁰c + 2∙²a²b¹c, and ternary output Carry F₂ = ⁰a²b¹c + ¹a¹b¹c + ¹a²b⁰c + ¹a²b¹c + ²a⁰b¹c + ²a¹b⁰c + ²a¹b¹c + ²a²b⁰c + ²a²b¹c. The displayed representation is executed by employing 1-RPLs for the variables {a, b, c} and utilizing the relevant ternary Galois field addition and multiplication operations from Table 1. The lattice grids depicted in Figure 9 and Figure 10 illustrate the three-dimensional regular lattice grid representations of the ternary maps in Figure 8, with the symbol - indicating ternary don’t care ϵ {0, 1, 2}.

As seen in Example 2, Figure 9 and Figure 10 illustrate a completely regular lattice grid in three dimensions. Every dimension relates to a value of the respective control variable, with value zero extending along the x-axis, value one extending along the y-axis and value two extending along the z-axis. Because the ternary function in Example 2 is symmetric, it was unnecessary to repeat any variables in the related regular lattice grid. In three-dimensional space, every control variable extends across a plane to manage the respective nodes, with these parallel planes illustrated by the appropriate dotted triangles as demonstrated in Figure 9 and Figure 10. This differs from the binary scenario, where each control variable extends along a horizontal line to regulate the associated nodes, as illustrated in Figure 6(a). Also, each node in Figure 9 and Figure 10 represents a three-input one-output multiplexer whose output goes in three directions.

Every internal node in Figure 9 and Figure 10 functions as a three-to-one multiplexer where multiplying each leaf value—moving counterclockwise—by all potential out-to-in paths (from leaves to root) and summing them using GF operations from Table 1 yields the maps F₁ and F₂ found in Figure 8(a) and Figure 8(b), respectively. Additionally, it is observed that internal nodes in Figure 9 and Figure 10 are positioned at the corners of three-dimensional cubes, unlike the binary case where nodes are situated at the corners of two-dimensional squares. As seen, the Sum and output Carry functions display symmetry, as there are no discrepancies in leaf values, eliminating the necessity to duplicate variables for these ternary functions to be implemented in the relevant three-dimensional regular lattice grids. Conversely, at least one leaf contains conflict values within non-symmetric ternary functions, hence the duplication of variables to symmetrize the related non-symmetric functions for implementing these functions in three-dimensional lattice grids.

Figure 8.Ternary maps for (a) ternary Sum F₁, and (b) ternary output Carry F₂.

Figure 9.The Sum function F₁ of the ternary 3-digit full adder.

Figure 10. The output Carry function F₂ of the ternary 3-digit full adder.

Three-dimensional regular lattice grids can also be used to synthesize Boolean functions in three-dimensional space, where the synthesis of binary functions is performed in three-dimensional space by the application of function-preserving two-valued to three-valued mapping. For example, this can be done as one can observe that both independent and dependent variables in the two-valued logic can have only two values {0, 1} and thus f ( x 1 , ⋯ , x n ) =   0 x 1 . f 0 ( x 1 , ⋯ , x n ) ⊕   1 x 1 . f 1 ( x 1 , ⋯ , x n ) where i   x is the two-valued 1-RPL for i and x ∈ { 0 , 1 } , and both independent and dependent variables in the three-valued logic can have three values {0, 1, 2} and thus f ( x 1 , ⋯ , x n ) =   0 x 1 . f 0 ( x 1 , ⋯ , x n ) +   1 x 1 . f 1 ( x 1 , ⋯ , x n ) +   2 x 1 . f 2 ( x 1 , ⋯ , x n ) where i   x is the three-valued 1-RPL for both i and x ∈ { 0 , 1 , 2 } , and therefore any two-valued function can be represented in three-valued logic by ignoring the second polarity and using only zero and first polarities. Thus, the two-valued function can be represented in three-dimensional lattice grid by ignoring the direction of the second polarity and using only the other two directions of zero and first polarities.

The realization of two-valued functions in three-dimensional lattice grid can be highly needed as 1) several important directions within near future technologies will perform function synthesis and the corresponding circuit fabrication in three-dimensional regular layout in order to minimize two-dimensional planar area space by fabricating the required IC circuits into the corresponding three-dimensional solid volume space, and 2) the ability to utilize the same three-dimensional lattice grid for the synthesis of three-valued functions besides the two-valued functions and thus achieving multi-functional operations using the same three-dimensional lattice grids.

Lattice grids that were presented in this Section will be later utilized in Section 5 to synthesize the corresponding digital functions for the important example of homeomorphic joint Viterbi decoder-symmetric-key cybersecurity where two-dimensional regular lattice grids will be used for the synthesis of binary functions in the same way that was shown in Subsection 3.2.

Recently, CNTs have garnered significant interest due to their distinct shapes, small sizes and unique properties, as well as their possible applications in various existing and developing technologies [10][19]-[22]. The CNT is composed of graphite which can form at the nanoscale in three distinct varieties:

1) Carbon nanoball, also known as buckyball, which is a molecule made up of 60 carbon atoms (C60) that are arranged in a shape resembling a soccer ball.

2) Carbon nanotube, which is a cylindrical nanostructure formed from a narrow strip of tiny graphite sheets, primarily existing in three forms: a) multi-walled CNT (MWCNT) where each CNT includes multiple hollow carbon cylinders nested together, b) single-walled CNT (SWCNT) consisting of a single layer of carbon tube, and c) double-walled CNT (DWCNT) which features two concentric layers and combines the attributes of both MWCNT and SWCNT exhibiting greater stability than SWCNT.

3) Carbon nanocoil (CNC) which is a three-dimensional helical spring-like form characterized by high elasticity, surface area and conductivity.

CNT technology is among the advanced emerging technologies within nanotechnology that has demonstrated high efficiency and diverse applications. Recent instances of these applications involve a) CFE-based CNT TVs that require significantly less power, thinner and offer superior resolution, b) CNT-based nanocircuits like CNT Field Effect Transistors (FETs) that possess great potential for reduced power consumption and increased speed compared to existing silicon-based FETs, and c) carbon nanocoils that can function as inductors in nanofilters and as mechanical nanosprings. In addition, CNTs have also been demonstrated for potentially exciting applications such as in CNT probes, new composite materials, CNT data storage devices capable of storing 10¹⁵ bytes/cm², drug delivery systems, nano lithography and CNT gears. The CNT characteristics of current carrying capacity, heat resistance, energy usage, and electron scattering make CNTs suitable for future applications such as in a) efficient power transmission systems, b) quantum computing for their ability to maintain the electron spin, c) nanowires which would lead to a reduction in the overall area taken up by interconnects during the fabrication of integrated circuits, d) constructing circuits and systems that must endure stress without sustaining structural damage, and e) various applications that need a broad spectrum of energy band gaps spanning from conductor to semiconductor states.

The CNT development, analyzed through Transmission Electron Microscopy (TEM), Atomic Force Microscopy (AFM) and Scanning Electron Microscopy (SEM), necessitates procedures with appropriate conditions and materials. At present, there are several techniques for producing different types of CNTs including 1) a significant spark formed between two graphite rods spaced a few millimeters apart, 2) chemical vapor deposition (CVD), and 3) a laser pulse directed at a graphite target.

Figure 11 illustrates a CNT-based solid-state multiplexer [10] in which CNT serves as the channel in a Field Effect Transistor (FET). In this context, we apply CNT as a FET channel in the device comprising of two CNT n-FETs and two CNT p-FETs with distinct interconnect geometries that serve for inputs A and B, controls C and C’, and output F. Figure 11 illustrates silicon (Si) functioning as a back-gate in the device, silicon dioxide (SiO₂) acting as an insulator, and gold serving as an electrode (conductor). Four metallic catalyst islands, with each pair situated at the opposing ends of the gold electrodes, can be utilized to cultivate CNTs between these pairs of electrodes instead of merely positioning CNTs in contact with the gold electrodes. The PMMA acts as a shield that safeguards anything underneath from contact with oxygen (O₂), which is required to change an n-CNTFET into a p-CNTFET.

The operation of the device depicted in Figure 11 can be described in the following manner: If C = “1”, the upper transmission gate (t-gate) is engaged allowing A to pass to F while the lower t-gate is inactive preventing B from passing. Conversely, if C = “0”, the lower t-gate activates permitting B to pass to F while the upper t-gate is inactive thus blocking A. Hence, the CNT-based solid-state multiplexer functions precisely as a 2-to-1 multiplexer.

Intra-molecular CNTFET technology can replace each sub-device in Figure 11, where a single CNT bundle is positioned atop three gold electrodes to create n-type and p-type CNTFETs on the same substrate, utilizing the same approach shown for the inter-molecular CNTFET. The creation of every sub-device in Figure 11 occurs as follows: At the outset, the two CNTFETs are of p-type. Following vacuum annealing, both CNTFETs transform into n-type. Both CNTFETs are subjected to oxygen for three minutes, resulting in the unprotected n-CNTFET reverting to its original p-type, while the protected CNTFET stays n-type. An alternative approach to create p-type and n-type CNTFETs involves doping a CNT channel with potassium to yield an n-type while a non-doped CNT results in a p-type. Dopping produces n-type CNTFET by shifting the Fermi energy level to the conduction band that results in an increase of electron concentration in that band which increases the corresponding conductance of the FET for a given positive gate voltage.

Figure 11. CNT-based solid-state multiplexer where CNT is used as FET channel.

Figure 12 depicts the architecture of the CNT-based magnetic multiplexer [10]. The device depicted in Figure 12 operates with the electrical current (#7) serving as input B which can have two states representing logic “0” and “1”, correspondingly. Additionally, the electrical current (#8) utilized as input A can represent two states that denote logic “0” and “1”, correspondingly. The two electrical currents (#7) and (#8) are moving in the directions shown in Figure 12 in CNTs (#1) and (#2), respectively. Consequently, the movement of these currents will generate magnetic fields surrounding CNTs (#1) and (#2) in accordance with Ampere’s circuital law within Maxwell’s equations, which connects the magnetic field encircling a closed loop to the electric current flowing through the loop.

Figure 12. CNT-based magnetic multiplexer.

The operation of the device in Figure 12 proceeds as follows: At first, CNT (#3) touches either CNT (#1) or CNT (#2), resulting in a current flowing through CNT (#3) in the same direction as currents (#7) and (#8). An electric current flows through CNTs (#4)-(#6), able to move in either the clockwise direction (#10) or the counterclockwise direction (#11). The electric current (#10) that passes through CNTs (#4)-(#6) will create a magnetic field in accordance with Maxwell’s equations, oriented per the right-hand thumb rule. If current (#11) travels through CNTs (#4)-(#6), it will produce a magnetic field in the opposite direction to that created by current (#10). The flow direction of the current in CNTs (#4)-(#6), and consequently the generated magnetic fields, acts as a control signal in a standard multiplexer; when current (#11) flows through CNTs (#4)-(#6), an attractive Lorentz force arises between the two current-carrying conductors, specifically between CNTs (#5) and (#3), causing CNT (#3) to move in space (#13) toward CNT (#5), resulting in contact with CNT (#2), indicating that current (#8) or input A is chosen to flow to the output. Conversely, if current (#10) is present in CNTs (#4)-(#6), a repulsive Lorentz force will be generated between CNT (#5) and CNT (#3), causing CNT (#3) to shift in the space (#13) away from CNT (#5) and subsequently create contact with CNT (#1), indicating that current (#7) or input B is chosen to flow to the output. Therefore, the CNT-based device in Figure 12 implements the operation of a two-to-one multiplexer.

This Subsection presents important background on carbon field emission (CFE) and its utilization in multiplexing which includes both CNT-based field emitters and carbon fiber-based field emitters.

4.4.1. CNT-Based Field Emitters

Field emission refers to the release of electrons from a cathode’s surface due to an applied electric field, which is contingent on the work function of the material that emits. This part highlights functional modeling of field emitters along with the relevant experimental configurations and assessments that define their time-dependent behaviors.

To conduct the static modeling of CNT-based field emitters, four field emission CNTs illustrated in Figures 13(b)-(e) were produced by Xintek, Inc. The copper anode is positioned on the right, while the utilized CNT emitter is fixed to a tungsten wire connected to the copper cylinder on the left, as depicted in Figure 13(a). Figures 13(b)-(e) show the images of CNT emitters for each CNT captured using a JEOL Ltd. model JEM 6300 Scanning Electron Microscope (SEM). Carbon nanotubes M-1 and M-4 utilize one MWCNT as the emitter, while carbon nanotubes C-3 and C-6 employ one SWCNT as the emitter. The CNTs employed were bundled together with diameters ranging from 10 to 30 nm, though field emission from each CNT occurs primarily at the single CNT at the bundle’s tip where the electric field is strongest.

Figure 13. CNT-based field emission: (a) structure of the field emission CNTs, and (b)-(e) images from Scanning Electron Microscopy of the CNT-based emitters for the four utilized CNTs.

The DC current-voltage behaviors were assessed for these four CNTs alongside a field emitter tube from Leybold Didactic GmbH, featuring an etched single crystal of tungsten as the emitter. All measurements taken with the five tubes were conducted at room temperature. The tungsten tip is attached to a filament, allowing it to be heated for cleaning just before each measurement session. Nevertheless, cleaning the CNT is not feasible, which likely leads to the “switch-on” phenomenon where the supply voltage needs to be temporarily elevated significantly above the operating point to trigger field emission with the CNT. The data obtained from the DC measurements were processed using the Fowler-Nordheim analysis which relies on a simplified version of the Fowler-Nordheim equation [23][24] that determines the current density magnitude as a function of the applied static field for field emission from a certain material as follows:

where J and E are the magnitudes of the current density and the electric field intensity, and A and B are parameters that are functions of the work function Φ, where work function values are Φ = 4.5 eV for tungsten and for the CNT was set to Φ = 4.9 eV.

In order to apply the Fowler-Nordheim equation to the DC current-voltage data, the following equation was also used which is valid for a given CNT, where I is the field emission current and V is the potential applied between the anode and the cathode:

Equations (3) and (4) can be combined to obtain the following equations for the parameters S and R, which are used to characterize the field emitters:

where the parameter S denotes the effective emitting area, defined as the physical area of the emitter assuming a uniform current density across a specific area and zero in other regions, while the parameter R signifies the effective radius of curvature of the emitter, also accounting for the local enhancement of the electric field caused by the elongation of the emitter or the decline of the field resulting from shielding by neighboring structures.

The Fowler-Nordheim plots of the DC current-voltage information were created utilizing ln(I/V²) as the y-axis and (1/V) as the x-axis. Figure 14 shows the unusual data for CNT C-6 that were gathered with the 2.575 GΩ ballast resistor. The effective radius of curvature values of the emitter R ranged from 77 to 110 nm for the four CNTs featuring CNT emitters. This indicates that the local electric field values at the emission sites reached as high as 14 V/nm in several of these measurements. It is shown that examining the field emission from different CNTs had estimated the electric field values by taking the applied voltage and dividing it by the distance from the anode to the emitting tip. The Fowler-Nordheim analysis indicated a value of 91 nm for parameter R in the Leybold tube, implying that the local electric field reached up to 5 V/nm in several of the measurements taken. Thus, the value of parameter R which was obtained for the Leybold tube appeared to be within reasonable range.

The Fowler-Nordheim analysis revealed that the effective emitting area S ranged from 81 to 230 nm² for the four CNTs with CNT emitters. If the existing density were uniform, this would relate to circular emitting areas with radii of about 5 - 9 nm. Lorenz microscopy has been utilized by others to directly identify the emission locations for field emission from MWCNT, revealing one or multiple sites with radii of a few nanometers, and their findings were in good alignment with other conducted experiments.

Figure 14.The resulting Fowler-Nordheim plot for CNT C-6.

4.4.2. Carbon Fiber Nanotips-Based Field Emitters

Because of the technological significance of carbon fibers, there has been an increasing interest in comprehending the mechanism of field electron emission from these fibers when subjected to an applied electric field. Employing carbon fibers as cathodes provides numerous advantages, including the capacity to function in a moderately high pressure, straightforward emitter production, excellent current consistency and extended longevity of the emitter. These cathodes are constructed from carbon fibers or other carbon-based substances. Figure 15 displays a scanning electron image of a finely pointed carbon fiber tip at approximately 10,000× magnification.

Figure 15. Scanning electron image of a very sharp carbon fiber nanotip.

To capture the emission characteristics, the voltage from extra high tension (EHT) to the tip is gradually increased until the emission current reached approximately one microampere on the picoammeter device, and then the voltage is gently lowered until the emission current disappears [25]. A linear Fowler-Nordheim plot is anticipated within this range. Throughout the experiments, a standard digital camera captured electronic emission images to examine the spatial distribution and consistency of the emission current. Both stability and brightness are crucial elements in assessing the quality of the electron source for real-world applications. A highly pointed carbon fiber tip was evaluated during the sample conditioning process with the apex radius of this tip measuring approximately 57 nm. Figure 16 illustrates the emission properties obtained from the I-V characteristics along with the related Fowler-Nordheim plots.

Figure 16. The I-V characteristics (left) and FN plot (right) of a very sharp carbon fiber nanotip during the cooling process, where the emission current stability becomes much higher.

4.4.3. CFE-Based Multiplexing

Through the application of the previously tested and noted characteristics and functions of CFE from the associated CNTs and nano-apex carbon fibers discussed in preceding Subsections 4.4.1 and 4.4.2, Figure 17 illustrates the CFE-based primitive that accomplishes the two-to-one controlled switching.

In Figure 17, the control signal used for managing the device’s electrical conductivity is realized through the applied electric field intensity (E), or alternatively, the work function (Φ) or voltage (V). The functioning of the device based on carbon field emission shown in Figure 17(b), proceeds as follows: by applying a high voltage (HV) control signal, the voltage difference between the carbon cathodes and the opposing anode is altered. This adjustment will enable the carbon cathode receiving the control signal (HV) to exhibit field emission, while the other carbon cathode guided by the complementary control signal will not display field emission. When the voltage difference is inverted, the carbon cathode receiving the complementary control signal will exhibit field emission whereas the other carbon cathode controlled by the signal (HV) will not display field emission. Hence, this device carries out the operation of the 2-to-1 controlled-switching illustrated in Figure 17(a). The experimental findings indicate that the spatial distance dwhich is needed between the cathodes and the opposing anode should be approximately 10 mm, otherwise beam distortion may happen impacting the current collected at the anode screen.

Figure 17. The CFE-based device implementing the operation of the two-to-one controlled-switching (CS): (a) two-to-one multiplexer ( G = a c + b c ¯ ), and (b) carbon field emission-based two-to-one CS.

The previously presented background that includes CNT-based solid-state multiplexing in Subsection 4.2, CNT-based magnetic multiplexing in Subsection 4.3 and CFE-based multiplexing in Subsection 4.4, can be further utilized to conduct the important operation of many-valued controlled-switching. Synthesizing many-to-one controlled-switching can be achieved using the fundamental two-to-one controlled-switches from Subsections 4.2-4.4. For example, one needs two multiplexers to realize the functionality of three-to-one controlled-switching which is illustrated in Figure 18 for three-valued logic.

Figure 18. Carbon-based three-to-one controlled-switching, where the two multiplexing devices can be implemented using any of the controlled-switches from Subsections 4.2-4.4.

In Figure 18, the initial device D1 produces a signal from two input signals, while the subsequent device D2 generates a signal from other two input signals, thus enabling the device in Figure 18 to function as a three-to-one multiplexer. In general, for m-valued logic, it is necessary to have (m-1) of the two-to-one controlled switches from Subsections 4.2-4.4 to realize the function of m-to-1 multiplexing. The carbon-based implementation of Galois-based arithmetic functions can be carried out as shown in Figure 19. In Figure 19(b), the variables {A, B} are ternary input variables with values ϵ {0, 1, 2}, and inputs C_k where k ϵ {0, 1, 2, 3} serve as two-valued control variables that can take values ϵ {0, 1}. Observe that Figure 19(b) executes the related GF(3) addition and multiplication operations that were shown in Table 1by applying the suitable values of control variables C_k that choose the relevant device inputs {A, B} and constant inputs {0, 1, 2}.

For example, Table 2 illustrates a case for the execution of GF(3) addition and multiplication operations that were displayed in Table 1 using Figure 19(b). In Table 2, the symbol (+) indicates GF(3) addition, symbol (*) denotes GF(3) multiplication, C_k (+) refers to the control variable for executing the ternary Galois-addition operation, while C_k (*) signifies the control variable for performing the ternary Galois multiplication operation. Given that three-valued lattice grids will be constructed using the Galois addition and multiplication operations outlined in Table 1, the circuit illustrated in Figure 19(b) can be applied in three-valued configurations whenever third radix Galois operations are executed. As an illustration, any system-level hierarchical execution can be achieved through the repeated application of the carbon-based multiplexing device depicted in Figure 19, where the relevant arithmetic functions can be performed using the circuit in Figure 19(b) and by employing the pertinent input values listed in Table 2.

Figure 19. Carbon-based implementation of Galois arithmetic operations: (a) controlled-switch that can be implemented using any of the multiplexing devices in Subsections 4.2-4.4, and (b) circuit that uses controlled-switching to implement the corresponding GF(3) addition and multiplication operations from Table 1.

The creation of three-valued functions through three-dimensional carbon-multiplexed lattice grids is achievable, with the lattice’s internal multiplexing nodes being implemented via CNT-based solid-state multiplexer (cf. Subsection 4.2), CNT-based magnetic multiplexer (cf. Subsection 4.3), or CFE-based multiplexer (cf. Subsection 4.4). As an instance of implementation, Example 3 illustrates the realization of a ternary non-symmetric function in a three-dimensional lattice grid by repeating variables. The operations conducted at each node in the associated three-dimensional lattice grid can be executed using the circuit depicted in Figure 19(b) along with the corresponding specified input values from Table 2.

Table 2. The implementation of GF(3) addition and multiplication operations from Table 1 using Figure 19(b).

Example 3. For the three-valued non-symmetric function F = ab + a'b'' depicted in Figure 20, Figure 21 demonstrates the implementation of this non-symmetric function in a three-dimensional regular lattice grid by employing variable repetition. In Figure 21, if one multiplies each leaf value, going counter clock wise, with all possible paths, from the leaves to the root, and adds them using the corresponding Galois operations from Table 1 then one will obtain the corresponding required map in Figure 20, where {⁰a, ¹a, ²a} are the zero, first and second polarities of the 1-RPL of variable a, {⁰b, ¹b, ²b} are the zero, first and second polarities of the 1-RPL of variable b, and variables a and b can take any value ϵ {0, 1, 2}.

Figure 20. Two-variable non-symmetric three-valued function F= ab + a'b'': (a) map of three-valued function F which is non-symmetric where a' is a single shift to the value of variable a and b'' is a double shift to the value of variable b, and (b) repeating variable ato achieve logic symmetrization of function F.

The resulting three-dimensional lattice grid (Figure 21) possesses high regularity, which facilitates compactness in three-dimensional space, ease of manufacturability, efficient testability, and low-power consumption due to its use of local interconnects. Galois operations performed at each internal node can be implemented using the switching circuit shown in Figure 19(b)and utilizing the specific input values from Table 2. Furthermore, inner multiplexing can be achieved through the CNT-based solid-state and magnetic multiplexers presented in Subsections 4.2 and 4.3, as well as the CFE-based multiplexer utilizing CNTs and nano-apex carbon fibers described in Subsection 4.4.

Figure 21.Regular nano-based three-dimensional lattice grids: (a) lattice grid corresponding to Figure 20(a) showing conflicting leaves in dark boxes, and (b) lattice grid corresponding to Figure 20(b) showing non-conflicting leaves achieved via variable repetition. The operations performed at each node in the resulting lattice grid can be implemented using the switching circuit from Figure 19(b) and the input values specified in Table 2.