The Cascaded H-Bridge Multilevel Inverter (CHB-MLI) is commonly used in medium- to high-power applications, including renewable energy systems and industrial motor drives [2] [3] [9] . It consists of multiple single-phase H-bridge power cells, which are typically connected in series on the AC side to generate a stepped output waveform that closely approximates a sinusoidal signal with reduced harmonic distortion [10] . Figure 1 shows the circuit of 5-level CHB-MLI.

Harmonic distortion is a significant issue in electrical power systems, often leading to system disturbances and reduced power quality. The increasing use of power electronic devices, particularly converters and inverters, has contributed to higher levels of Total Harmonic Distortion (THD), which affects electrical power across a wide range of frequencies [11] . These distortions are primarily caused by nonlinear loads within the system, where the current waveform deviates from the ideal sinusoidal shape typically seen in linear load conditions. Harmonics can be described as the presence of additional waveforms whose frequencies are integer multiples of the fundamental frequency [12] . The superposition of these harmonic components on the fundamental waveform results in signal distortion, as illustrated in Figure 2 .

In voltage-source inverters, DC bus utilization is defined as the ratio of the output fundamental voltage amplitude to the available DC link,

${\eta }_{\text{bus}}=V_{1,\text{peak}}/V_{dc,\text{available}}$ (1)

where V₁ is the fundamental of the inverter output voltage, and V_dc,available is the total DC link the topology can impress across the output without entering over-modulation. This parameter evaluates how effectively the inverter converts the available DC voltage into useful AC fundamental voltage. A higher fundamental voltage at the same DC link directly implies better utilization, as a larger portion of the DC bus is converted into usable output rather than being limited by the modulation process [13] .

Carrier-Based Pulse Width Modulation (CB-PWM) is a widely adopted technique for controlling the switching of power devices in multilevel inverters, particularly in Cascaded H-Bridge Multilevel Inverters (CHB-MLI) [7] [14] . The basic principle of CB-PWM involves comparing a modulation signal with one or more carrier signals to generate gate signals that control the ON and OFF states of the power switches. One of the key reasons CB-PWM remains popular is its simplicity of implementation. Unlike Space Vector PWM (SV-PWM) and Model Predictive Control (MPC), CB-PWM is not computationally demanding and does not require high-performance microcontrollers. In addition, CB-PWM has been shown to be effective in reducing the Total Harmonic Distortion (THD) of the CHB-MLI output waveform [14] [15] . There are two main CB-PWM categories: Phase-Shifted PWM (PS-PWM) and Level-Shifted PWM (LS-PWM) [7] [8] . In PS-PWM, all carrier signals share the same peak amplitude and frequency but are phase-shifted relative to each other. The phase shift depends on the desired number of voltage levels and the inverter topology. Figure 3 illustrates an example of PS-PWM applied to a 5-level CHB-MLI. On the other hand, in LS-PWM, each carrier signal also has the same peak and frequency, but they are vertically stacked on top of each other. LS-PWM includes three carrier arrangements: In-Phase Disposition PWM (IPD-PWM), where all carriers are in phase (shown in Figure 4 ); Alternate Phase Opposition Disposition PWM (APOD-PWM) where carriers are alternately in phase and out of phase (shown on Figure 5 ); and Phase Opposition Disposition PWM (POD-PWM), where carriers above the zero reference are in phase while those below are out of phase (shown in Figure 6 ). Each modulation technique has different implementation characteristics and produces different effects on the inverter’s performance depending on the selected CB-PWM strategy.

THI²-PWM is a unique method developed in [16] specifically for a 5-level three-phase Cascaded H-Bridge Multilevel Inverter (CHB-MLI) used in medium-voltage induction motor drive applications. The motivation behind the development of THI²-PWM was to address the issue of high torque ripple, which is a result of the pulsating torque introduced by conventional CB-PWM methods. The distinctive shape of the carrier signals used in this method can be observed in Figure 7 . Figure 8 illustrates the implementation of THI²-PWM in simulation, where the technique employs the Min function combined with Third Harmonic Injection (THI) to generate its unique carrier signal structure. Other advantages of the THI²-PWM method include lower output voltage THD, reduced stator current and voltage distortion, decreased power losses, smoother dynamic response in induction motor drives, and minimized torque ripple [16] .

The THI²-PWM method presented in [16] was originally developed for three-phase CHB-MLI systems. In this project, when applied to a single-phase 5-level CHB-MLI, the output waveform exhibited a noticeable DC component, or DC offset, in the frequency spectrum, as shown in Figure 9 , with the offset appearing at 0 Hz. In three-phase systems, the triplen (zero-sequence) content that accompanies third-harmonic injection cancels in the line-to-line voltages, so no net DC appears. In a single-phase topology there is no inter-phase cancellation path, and the injected zero-sequence biases the reference around the carrier, causes an imbalance between the positive and negative half cycles of the output waveform, as illustrated in Figure 10 .

This DC bias is undesirable as it can cause DC current injection into the load or grid, violating standards such as IEC 61727 and IEEE 1547 [17] . To mitigate this, the proposed modified THI²-PWM generates a 180˚ phase-shifted twin of the injected reference and applies a Min-function with the lower carriers, ensuring symmetrical clipping and zero average voltage in each carrier period. This approach effectively removes the DC offset while maintaining the third-harmonic peak-flattening effect, thus preserving both the THD reduction and improved DC bus utilization.

The implementation of the THI²-PWM technique follows a similar procedure to LS-PWM, particularly in determining the carrier signal frequency and calculating the amplitude modulation index (M_a) for each CHB-MLI level. As a result, the carrier signal parameters used in THI²-PWM do not require separate calculation, since they share the same configuration as in conventional LS-PWM. The distinguishing feature of THI²-PWM lies in its use of third harmonic injection; a method commonly applied in three-phase inverters to enhance output voltage by modifying the reference signal with a third harmonic component at a specific amplitude. In THI²-PWM, however, the third harmonic is injected into the original carrier signal itself, generating the unique waveform required for the proposed modulation technique such as shown in Figure 11 .

The injected signal can be represented as:

$V_{cr}=1.1547\left(2A_{cr}\right)\sin \left(2\text{π}\times \frac{f_{cr}}{2}\right)+0.19245\left(2A_{cr}\right)\sin \left(2\text{π}\times \frac{3f_{cr}}{2}\right)$ (2)

where:

A_cr = carrier signal amplitude

f_cr = carrier signal frequency

After that, the third harmonic injected signal must be phase shifted by 180 degrees and compare it with initial signal using Min function to extract lowest value from both waveforms, such as shown in Figure 12 . Whereas the arrangement of carrier signal for single-phase 5-level CHB-MLI is as shown in Figure 13 . Since the original technique injects DC offset into the load, the carrier signals must be modified by changing the arrangement of the bottom two carrier signals, such as shown in Figure 14 . The overall block diagram for the modified THI²-PWM method is as shown in Figure 15 .

MATLAB Simulink simulations of single phase 5-level CHB-MLI using conventional CB-PWM and modified THI²-PWM methods are conducted as shown in Figure 16 . In the simulation, the total DC supply voltage combined from all H-Bridge cells is 200 V, the load consists of a 10 Ω resistor and a 40 mH inductor, and the output voltage operates at a frequency of 50 Hz and switching frequency of 4 kHz. The switching frequency of 4 kHz was selected as a practical compromise between harmonic performance and switching losses, giving an f_sw/f₁ ratio of 80 (4 kHz/50 Hz), which is well above the minimum recommended for carrier-based PWM to suppress low-order harmonics while limiting device stress. The total DC link voltage of 200 V was chosen as a safe, laboratory-scale value that ensures realistic device ratings and load sizing without affecting percentage THD, since in the linear modulation region the harmonic spectrum scales proportionally with voltage. The relative THD improvement achieved by the proposed modified THI²-PWM over conventional CB-PWM methods is expected to persist for higher switching frequencies or different DC link voltages, as it originates from the modulation strategy itself rather than the specific operating point.