The real model of the quadratic boost, i.e. taking into account the losses in all components, is shown in Figure 1 :

The power balance is written as:

$P_I=P_0+P_{LS}$ (1)

With

$P_{LS}=P_{r_L}+P_{r_C}+P_D+P_{FET}$ (2)

P_I, P_O, $P_{r_L}$, $P_{r_C}$, P_D, P_FET are respectively the input power, the output power, the power losses through the inductors series resistance $r_{L_1}$, $r_{L_2}$, the power losses through the capacitors series resistance $r_{C_1}$, $r_{C_2}$, the power losses through the diode D₁, D₂, D₃ and, the power losses through the switch [14] [15] .

Substituting each term by its expression, we obtain:

$\begin{array}{c}{V}_I\ast I_I=V_0\ast I_0+[\frac{r_{L_1}+\alpha \left(1-\alpha \right)\cdot r_{C_1}}{{\left(1-\alpha \right)}^4\cdot R}+\frac{r_{L_2}+\alpha \left(1-\alpha \right)\cdot r_{C_2}}{{\left(1-\alpha \right)}^2\cdot R}+\frac{R_F}{R}\left(\frac{1+{\left(1-\alpha \right)}^3}{{\left(1-\alpha \right)}^4}\right)\\ +\frac{V_F}{V_0}\left(\frac{1+{\left(1-\alpha \right)}^2}{{\left(1-\alpha \right)}^2}\right)+\frac{r_{DS}\alpha }{{\left(1-\alpha \right)}^{4}R}+\frac{1}{2}{f}_S{C}_{0}R]\cdot \frac{V_0^2}{R}\end{array}$ (3)

From this expression, we can derive the gain in voltage:

$G=\frac{V_0}{V_I}=\frac{{\left(1-\alpha \right)}^{2}R}{{\left(1-\alpha \right)}^{4}R+r_{L_1}+\left[\begin{array}{l}\alpha \left(1-\alpha \right)\cdot r_{C_1}+{\left(1-\alpha \right)}^2{r}_{L_2}+\alpha {\left(1-\alpha \right)}^3\cdot r_{C_2}+R_F\left(1+{\left(1-\alpha \right)}^3\right)\\ +\frac{V_F}{V_0}\left(1+{\left(1-\alpha \right)}^2\right){\left(1-\alpha \right)}^{2}R+r_{DS}\alpha +\frac{1}{2}{f}_S{C}_0{\left(1-\alpha \right)}^4{R}^2\end{array}\right]}$ (4)

and the conversion efficiency:

$\eta =\frac{P_0}{P_I}=\frac{P_0}{P_0+P_{LS}}$ (5)

$\eta =\frac{1}{1+\left[\begin{array}{l}\frac{r_{L_1}+\alpha \left(1-\alpha \right)\cdot r_{C_1}}{{\left(1-\alpha \right)}^4\cdot R}+\frac{r_{L_2}+\alpha \left(1-\alpha \right)\cdot r_{C_2}}{{\left(1-\alpha \right)}^2\cdot R}+\frac{R_F}{R}\left(\frac{1+{\left(1-\alpha \right)}^3}{{\left(1-\alpha \right)}^4}\right)\\ +\frac{V_F}{V_0}\left(\frac{1+{\left(1-\alpha \right)}^2}{{\left(1-\alpha \right)}^2}\right)+\frac{r_{DS}\alpha }{{\left(1-\alpha \right)}^{4}R}+\frac{1}{2}{f}_S{C}_{0}R\end{array}\right]}$ (6)

These different expressions were also used in the dimensioning for the making of the prototype.

We went on the basis of an input voltage (voltage from the panels) of 12 V on average for an output voltage of 30 V. After the mathematical calculations to obtain the values of the components, the prototype has been realized as shown in Figure 2 .

We make sure of the correct operation by visualizing the potential differences, as shown in Figure 3 , at the terminals of the switches [14] .

We have the control signal which is a square wave signal with a duty cycle of 0.36 that we have imposed on it. The transistor also receives the signal by the shape of its gate voltage, which is similar to the PWM signal. The Drain-Source voltage signal is complementary to the Gate signal, so the transistor switches perfectly.

Also, we observe that the signal of V_D2 signal is complementary to that of V_DS. It is therefore the same shape as the one of the Gate. The V_D1 signal too is of the same shape as that of V_DS which is normal. It is therefore complementary like the signal of the voltage V_D3 to that of the diode D₂ and the Gate as we expected.

We therefore observe the input and output voltages in Figure 4 :

These voltages seem correct in spite of the parasites observed on the output voltage. So we can therefore conclude that the device works perfectly.