Article citationsMore>>

“The Comparative Study of Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits,” 2011 15th International Conference on System Theory, Control and Computing (ICSTCC), Sinaia, 14-16 Octomber 2011, pp. 1-4.

has been cited by the following article:

• TITLE: Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits

  AUTHORS: Mihai Grigore Timis, Alexandru Valachi, Alexandru Barleanu, Andrei Stan

  KEYWORDS: Combinational Circuits; Static Hazard; Logic Design; Boolean Functions

  JOURNAL NAME: Circuits and Systems, Vol.4 No.7, November 8, 2013

  ABSTRACT: In this paper, the authors continue the researches described in [1], that consists in a comparative study of two methods to eliminate the static hazard from logical functions, by using the form of Product of Sums (POS), static hazard “0”. In the first method, it used the consensus theorem to determine the cover term that is equal with the product of the two residual implicants, and in the second method it resolved a Boolean equation system. The authors observed that in the second method the digital hazard can be earlier detected. If the Boolean equation system is incompatible (doesn’t have solutions), the considered logical function doesn’t have the static 1 hazard regarding the coupled variable. Using the logical computations, this method permits to determine the needed transitions to eliminate the digital hazard.