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E. D. Diclaudis, G. Orlandi and F, Piazza, “A Systolic Redundant Residue Arithmetic Error Correction Circuit,” IEEE Transactions on Computers, Vol. 42, No. 4, 1993, pp. 427-433. http://dx.doi.org/10.1109/12.214689

has been cited by the following article:

• TITLE: Parallel Algorithms for Residue Scaling and Error Correction in Residue Arithmetic

  AUTHORS: Hao-Yung Lo, Ting-Wei Lin

  KEYWORDS: Chinese Remainder Theorem (CRT); Error Correction; Error Detection; Parallel Residue Scaling; Residue Number Systems (RNS); Target Race Distance (TRD); Target Residue-Digit Difference

  JOURNAL NAME: Wireless Engineering and Technology, Vol.4 No.4, October 29, 2013

  ABSTRACT: In this paper, we present two new algorithms in residue number systems for scaling and error correction. The first algorithm is the Cyclic Property of Residue-Digit Difference (CPRDD). It is used to speed up the residue multiple error correction due to its parallel processes. The second is called the Target Race Distance (TRD). It is used to speed up residue scaling. Both of these two algorithms are used without the need for Mixed Radix Conversion (MRC) or Chinese Residue Theorem (CRT) techniques, which are time consuming and require hardware complexity. Furthermore, the residue scaling can be performed in parallel for any combination of moduli set members without using lookup tables.