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H. Y. Aleksandar, “Test Generator for Examination of PLL and DDS Systems,” Electronics, 2008, pp. 72-76.

has been cited by the following article:

• TITLE: A Digital Phase Locked Loop Speed Control of Three Phase Induction Motor Drive: Performances Analysis

  AUTHORS: Ben Hamed Mouna, Sbita Lassaâd

  KEYWORDS: Digital Phase Locked Loop (DPLL), Induction Motor, Scalar Strategy, Speed Drives and Load Appliance

  JOURNAL NAME: Energy and Power Engineering, Vol.3 No.1, February 25, 2011

  ABSTRACT: This paper deals with performance analysis and implementation of a three phase inverter fed induction motor (IM) drive system. The closed loop control scheme of the drive utilizes the Digital Phase Locked Loop (DPLL). The DPLL is safely implemented all around the well known integrated circuit DPLL 4046. An ex-perimental verification is carried out on one kw scalar controlled IM system drives for a wide range of speeds and loads appliance. This presents a simple and high performance solution for industrial applications.