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F. Yang et al., “A 4.8 GHz CMOS LC Balanced Oscillator with Symmetry Noise Filtering Technique,” International Conference on Solid-State Integrated Circuits Technology, Vol. 2, No. 7, 2004, pp. 1315-1320. doi:10.1109/ICSICT.2004.1436795

has been cited by the following article:

• TITLE: Phase and Quadrature Pulsed Bias LC-CMOS VCO

  AUTHORS: Stefano Perticaroli, Fabrizio Palma, Adriano Carbone

  KEYWORDS: Phase And Quadrature VCO, Pulsed Bias Oscillator, Floquet Eigenvectors Noise Decomposition

  JOURNAL NAME: Circuits and Systems, Vol.2 No.1, January 27, 2011

  ABSTRACT: Pulsed bias is an attempt to improve the performance of oscillators in integrated circuits as a result of architectural innovation. Given the relatively low value of resonator quality factor achievable on-chip, for a specified bias voltage level, pulsed bias may result in a lower power consumption and in an improvement of the spectral purity of the oscillation. The main drawback of this approach is the need to introduce a certain time delay in order to properly position pulses with respect to oscillation waveform. Delay accumulation requires further energy dissipation and introduce additional jitter. In this paper we present a new architecture capable to avoid unnecessary delay, based on the idea to apply the pulsed bias approach to a quadrature oscillator. A ?rst circuit-level implementation of this concept is presented with simulation results.