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S. Mahapatra and A. M. Ionescu, “Realization of Multiple Valued Logic and Memory by Hybrid SETMOS Architecture,” IEEE transactions on Nanotechnology, Vol. 4, No. 6, 2005, pp. 705-714. doi:10.1109/TNANO.2005.858602

has been cited by the following article:

• TITLE: Study of Two One-Dimensional Multi Tunnel Junctions Arrays Structures by SIMON

  AUTHORS: Amine Touati, Samir Chatbouri, Nabil Sghaier, Adel Kalboussi

  KEYWORDS: Multi Tunnel Junctions (MTJs); Coulomb Blockade Effect; Effective Capacitances; SIMON Simulator

  JOURNAL NAME: World Journal of Nano Science and Engineering, Vol.2 No.4, December 11, 2012

  ABSTRACT: Multi Tunnel Junctions (MTJs) have attracted much attention recently in the fields of Single-Electron Transistor (SET) and Single-Electron Memory (SEM). In this paper, we investigate a nano-device structure using a two one dimensional array MTJs connected to the basic Single Electron Circuits, in order to analyze the impact of physical parameters on the performances and application of this structure. The device generates can operate at room temperature. The simulation of single-electron circuit demonstrates with Monte Carlo simulator, SIMON.