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P. Bai, et al., “A 65 nm Logic Technology Featuring 35 nm Gate Lengths, Enhanced Channel Strain, 8 Cu Interconnect Layers, Low-k ILD and 0.57 μm2 SRAM Cell,” International Electron Devices Meeting Technical Digest, San Francisco, 13-15 December 2004, pp. 657-660.

has been cited by the following article:

• TITLE: Future Semiconductor Devices for Multi-Valued Logic Circuit Design

  AUTHORS: Supriya Karmakar, Faquir C. Jain

  KEYWORDS: MVL; Quantum Dots; FET; QDCFET; QDGFET; SWSFET

  JOURNAL NAME: Materials Sciences and Applications, Vol.3 No.11, November 29, 2012

  ABSTRACT: This paper introduces future devices for multi-valued logic implementation. Quantum dot gate field effect transistor (QDGFET) works based on the change in threshold voltage due to stored charge in the quantum dots in the gate region. Quantum dot channel field effect transistor (QDCFET) produces more number of states in their transfer characteristics because of charge flow through the mini-band structure formed by the overlapping energy bands of the neighboring quantum dots in the channel region of the FET. On the other hand spatial wave-function switched field effect transistor (SWSFET) produces more number of states in its transfer characteristic based on the switching of charge carriers from one channel to other channel of the device. In this paper we discuss QDGFET, QDCFET and SWSFET in detail to explore their application in future multi-valued logic circuits.