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K. R. Dandekar, H. Ling and G. H. Xu, “Smart Antenna Array Calibration Procedure including Amplitude and Phase Mismatch and Mutual Coupling Effects,” IEEE Conference on Personal Wireless Communications (PWC), Vol. 12, 2000, pp. 293-297.

has been cited by the following article:

• TITLE: A Storage Architecture for High Speed Signal Processing: Embedding RAID 0 on FPGA

  AUTHORS: Ningxiao Sun, Qiongzhi Wu, Zhaojian Jin

  KEYWORDS: RAID on FPGA; SSD; High Speed Data Storage

  JOURNAL NAME: Journal of Signal and Information Processing, Vol.3 No.3, August 31, 2012

  ABSTRACT: The article proposes a new architecture based on RAID 0 tech in computer science for signal processing field to store high speed data. It is composed of SSD driven by FPGA, called SSD-based RAID on FPGA. This new architecture features high storage rate, mass capacity and small volume, and it is an efficient solution to store high speed data. The article describes the construction of SRF in details, and shows the test result of a demo system based on the architecture.