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R. J. Baker, “CMOS Circuit Design, Layout, and Simulation,” IEEE Press, Wiley-Interscience, A John Wiley & sons, Inc., Publication, New York, 2005, Chapter 9, p. 291.

has been cited by the following article:

• TITLE: Design and Analysis of a Power Efficient Linearly Tunable Cross-Coupled Transconductor Having Separate Bias Control

  AUTHORS: Vijaya Bhadauria, Krishna Kant, Swapna Banerjee

  KEYWORDS: Analog electronics; low power Analog CMOS Circuit; Operational Transconductance Amplifier (OTA); Multiple-output OTA (MOTA); MOS Transconductors; linearly tunable Gm; Current efficiency; Linearization Techniques; Harmonic Distortion Analysis

  JOURNAL NAME: Circuits and Systems, Vol.3 No.1, December 31, 2011

  ABSTRACT: A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.