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Khamlich, S., Khamlich, F., Atouf, I. and Benrabh, M. (2021) Performance Evaluation and Implementations of MFCC, SVM and MLP Algorithms in the FPGA Board. International Journal of Electrical and Computer Engineering Systems, 12, 139-153.
https://doi.org/10.32985/ijeces.12.3.3

has been cited by the following article:

• TITLE: Implementation on FPGA of Neuro-Genetic PID Controllers Auto-Tuning

  AUTHORS: Nícolas Rosa, Marcio da Silva Arantes, Claudio Fabiano Motta Toledo, João Miguel G. Lima

  KEYWORDS: Genetic Algorithms, PID Controller, FPGA Board, Neural Networks

  JOURNAL NAME: Intelligent Information Management, Vol.14 No.5, September 29, 2022

  ABSTRACT: The present paper studies the use of genetic algorithm to optimize the tuning of the Proportional, Integral and Derivative (PID) controller. Two control criteria were considered, the integral of the time multiplied by the absolute error (ITAE), and the integral of the time multiplied by the absolute output (ITAY). The time variant plant tested is a first-order plant with time delay. We aim at a real time implementation inside a digital board, so, the previous continuous approach was discretized and tested; the corresponding control algorithm is presented in this paper. The genetic algorithms and the PID controller are executed using the soft processor NIOS II in the Field Programmable Gate Array (FPGA). The computational results show the robustness and versatility of this technology.