Article citationsMore>>

Arai, S., Mase, S., Yamazato, T., Endo, T., Fujii, T., Tanimoto, M., et al. (2007) Experimental on Hierarchical Transmission Scheme for Visible Light Communication Using LED Traffic Light and High-Speed Camera. 2007 IEEE 66th Vehicular Technology Conference, Baltimore, 30 September-3 October 2007, 2174-2178.
https://doi.org/10.1109/VETECF.2007.456

has been cited by the following article:

• TITLE: Design of Traffic Light Based on Field Programmable Gate Array

  AUTHORS: Lei Zhao

  KEYWORDS: FPGA, Intelligent Traffic Lights, Clock Division, Polling Model

  JOURNAL NAME: Journal of Power and Energy Engineering, Vol.9 No.5, May 27, 2021

  ABSTRACT: The use of fixed-time traffic lights for road traffic control has the disadvantage of low traffic efficiency. In order to optimize the vehicle traffic at the intersection, this paper proposes a design scheme of a real-time control system for road intelligent traffic lights based on FPGA. The system adopts the polling control model, the vehicle detector detects the arrival rate of vehicles, and obtains the corresponding traffic light green time length according to the traffic rules and polling model theory. Using Altera’s Cyclone IV series EP4CE15E22C8 chip as the development platform, a specific design plan is given. The circuit mainly includes program-controlled amplifier module, AD acquisition module, cross-correlation calculation module, serial port transmission and Lab-VIEW module. The system can realize the intelligent adjustment of traffic lights. Different vehicle arrival rates are detected at different times, so that the corresponding traffic light configuration time length changes accordingly. This intelligent adjustment controls road traffic and makes the main and branch roads coordinate and cooperate, thereby improving the traffic efficiency of the intersection.