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Heo, S.I., Kahng, A.B., Kim, M., Wang, L. and Yang, C. (2019) Detailed Placement for IR Drop Mitigation by Power Staple Insertion in Sub-10nm VLSI. 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, 25-29 March 2019, 830-835.
https://doi.org/10.23919/DATE.2019.8715096

has been cited by the following article:

• TITLE: Enhanced Power and Ground Mesh Structure for IR-Drop Reduction

  AUTHORS: Vakhtang Janpoladov, Suren Abazyan

  KEYWORDS: IR Drop, Power and Ground Mesh, Wire Length, Resistance, Measurement

  JOURNAL NAME: Open Access Library Journal, Vol.7 No.5, May 13, 2020

  ABSTRACT: New enhanced power/ground mesh structure is presented for voltage drop (IR drop) reduction on power distribution network in integrated circuits (ICs). The new structure focuses on the length of the overall power/ground mesh wire pattern, reducing it by using a complex dotted line wire pattern instead of the usual mesh straps, which brings to wire length reduction on almost 40%, while via count on changed metal layer remained the same. Measurements of the voltage drop prove that with proposed mesh structure IR drop reduced about 76% for power net compared to standard mesh structure but runtime for mesh creation is increased due to more complex patterns. Proposed structure can be used in advanced technology nodes where IR drop phenomenon has become critical for performance of the ICs.