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Meng, K. and Joseph, R. (2006) Process Variation Aware Cache Leakage Management. International Symposium on Low Power Electronics and Design, Tegernsee, 4-6 October 2006, 262-267.

has been cited by the following article:

• TITLE: Review of the Global Trend of Interconnect Reliability for Integrated Circuit

  AUTHORS: Qian Lin, Haifeng Wu, Guoqing Jia

  KEYWORDS: Integrated Circuit, Interconnect Reliability, Interconnect Modeling, Interconnect Process

  JOURNAL NAME: Circuits and Systems, Vol.9 No.2, February 8, 2018

  ABSTRACT: Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect reliability, a comprehensive review of the published literatures is carried out. This can depict the global trend of ICs’ interconnect reliability and help the new entrants to understand the present situation of this area.