Article citationsMore>>

Gupta, S., Moroz, V., Smith, L., et al. (2014) 7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn. IEEE Transactions on Electron Devices, 61, 1222-1230.
https://doi.org/10.1109/TED.2014.2311129

has been cited by the following article:

SCIRP Newsletter
Copyright © 2006-2026 Scientific Research Publishing Inc. All Rights Reserved.
Top