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Khellah, M., Somasekhar, D., Ye, Y., Kim, N.S., Howard, J., Ruhl, G. and De, V. (2007) A 256-Kb dual-Vcc SRAM Building Block in 65-nm CMOS Process with Actively Clamped Sleep Transistor. IEEE Journal of Solid-State Circuits, 42, 233-241.
https://doi.org/10.1109/JSSC.2006.888357

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