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Guo, J., Liu, Y., Chou, M.H., Wang, M.T. and Shone, F. (1998) A Three-Terminal Band-Trap-Band Tunneling Model for Drain Engineering and Substrate Bias Effect on GIDL in MOSFET. IEEE Transactions on Electron Devices, 45, 1518-1523.
https://doi.org/10.1109/16.701483

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