TITLE:
Analysis of Reduced Switch Topology Multilevel Inverter with Different Pulse Width Modulation Technique and Its Application with DSTATCOM
AUTHORS:
Sambasivam Rajalakshmi, Parthasarathy Rangarajan
KEYWORDS:
Reduced Switch Count Multilevel Inverter, PWM Method, Harmonic Level, DSTATCOM
JOURNAL NAME:
Circuits and Systems,
Vol.7 No.9,
July
20,
2016
ABSTRACT: Multilevel inverter has
played a vital role in medium and high power applications in the recent years.
In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI)
topology is presented with different pulse width modulation techniques. The
harmonic level analysis is carried out for the reduced switch count multilevel
inverter with the different PWM technique such as with Alternate Phase
Opposition Disposition (APOD) method, In Phase Disposition (IPD) methodand multi reference pulse width
modulation method for five level, seven level , nine level and eleven level
inverter. The simulation results are compared with the cascaded H Bridge Multi
Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is
used for the Distribution Static Synchronous Compensator (DSTATCOM) application
in the nonlinear load connected systemfor
power factor improvement. The result shows that the harmonic level and the
number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI
employed in DSTATCOM improves the power factor and harmonic level of the system
when it is connected to the nonlinear load.