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Rangaraju, H.G., Babu Suresh, A. and Muralidhara, K.N. (2013) Design of Efficient Reversible Multiplier. In: Meghanathan, N., Nagamalai, D. and Chaki, N., Eds., Advances in Computing and Information Technology, Springer, Berlin Heidelberg, 571-579.
http://dx.doi.org/10.1007/978-3-642-31600-5_56

has been cited by the following article:

• TITLE: Design of Compact Baugh-Wooley Multiplier Using Reversible Logic

  AUTHORS: V. Rajmohan, O. Uma Maheswari

  KEYWORDS: Multiplier, Baugh-Wooley, Low-Power, Reversible Logic, Quantum Computer

  JOURNAL NAME: Circuits and Systems, Vol.7 No.8, June 15, 2016

  ABSTRACT: In today’s digital era, developing digital circuits is bounded by the research towards investigating various nano devices. This paper provides the design of compact Baugh-Wooley multiplier using reversible logic. Even though various researches have been done for designing reversible multiplier, this work is the first in the literature to use Baugh-Wooley algorithm using reversible logic. In this work, a new 5 × 5 reversible multiplier cell is proposed which will be useful in designing Baugh-Wooley multiplier. The proposed single multiplier cell is able to perform addition of a 1 × 1 product with the sum and carry from the previous cell. This reversible multiplier cell is useful in building up regularity in the array multipliers. The Toffoli gate synthesis of the proposed reversible multiplier cell is also given.