TITLE:
Design of Low Power and High Speed Correlators for IEEE 802.16 WiMAX Systems
AUTHORS:
B. Sivasankari, P. Poongodi
KEYWORDS:
Communication, Timing Synchronization, FPGA, Multipliers, Parallel Processing, Power, Delay
JOURNAL NAME:
Circuits and Systems,
Vol.7 No.8,
June
9,
2016
ABSTRACT: The advanced communication
system uses wireless broadband access technologies which provide high speed
data connectivity to the subscribers. One of the most popular wireless access
technology is Worldwide Interoperability for Microwave Access (WiMAX) and it is
based on IEEE 802.16 standard. WiMAX used Orthogonal Frequency Division
Multiplexing (OFDM) is an effective modulation technique to improve the timing
synchronization. The performance of channel is affecteddue to the synchronization mismatching
between the transmitter and receiver ends. To achievethe timing synchronization in IEEE
802.16 systems, the cross correlator is used to synchronize the received signal
with the known signal. In this paper, two high speed correlators are proposed
based on Q1.15 format, which is used to validate the timing synchronization
problem. The proposed work has been mapped on XC6VCX75T FPGA and simulations
are carried out on the Xilinx-ISIM platform. The implementation result shows
that the power delay product reduction is 40.81%, and delay reduction is 39.59%
over the conventional multiplier less correlators.