TITLE:
FPGA Implementation of Approximate 2D Discrete Cosine Transforms
AUTHORS:
M. Thiruveni Raguraman, D. Shanthi Saravanan
KEYWORDS:
Discrete Cosine Transform, Energy Compaction, Field Programmable Gate Array, Dimension
JOURNAL NAME:
Circuits and Systems,
Vol.7 No.4,
April
28,
2016
ABSTRACT: Discrete cosine transform
(DCT) is frequently used in image and video signal processing due to its high
energy compaction property. Humans are able to perceive and identify the
information from slightly erroneous images. It is enough to produce approximate
outputs rather than absolute outputs which in turn reduce the circuit
complexity. Numbers of applications like image and video processing need higher
dimensional DCT algorithms. So the existing architectures of one dimensional
(1D) approximate DCTs are reviewed and extended to two dimensional (2D)
approximate DCTs. Approximate 2D multiplier-free DCT architectures are coded in
Verilog, simulated in Modelsim to evaluate the correctness, synthesized to
evaluate the performance and implemented in virtexE Field Programmable Gate
Array (FPGA) kit. A comparative analysis of approximate 2D DCT architectures is
carried out in terms of speed and area.