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J. Choi, M. Swaminathan, B. Beker and R. Master, “Modeling of Realistic On-Chip Power Grid Using FDTD method,” IEEE International Symposium Electromagnetic Compatibility, Vol. 1, 2002, pp. 238-243.

has been cited by the following article:

• TITLE: Simplified Model of a Layer of Interconnects under a Spiral Inductor

  AUTHORS: Sonia M. Holik, Timothy D. Drysdale

  KEYWORDS: Effective Medium Theory, Interconnects, Spiral Inductor

  JOURNAL NAME: Journal of Electromagnetic Analysis and Applications, Vol.3 No.6, June 23, 2011

  ABSTRACT: An empirical effective medium approximation that provides a homogeneous equivalent for a layer of interconnects un-derneath a spiral inductor is presented. When used as part of a numerical 3D model of the inductor, this approach yields a faster simulation that uses less memory, yet still predicts the quality factor and inductance to within 1%. We expect this technique to find use in the electromagnetic modeling of System-on-Chip.