TITLE:
Hardware Realization of Artificial Neural Network Based Intrusion Detection & Prevention System
AUTHORS:
Indraneel Mukhopadhyay, Mohuya Chakraborty
KEYWORDS:
Artificial Neural Network, Feed Forward Multilayer ANN, Intrusion Detection & Prevention System, FPGA, VHDL, Virtex 7
JOURNAL NAME:
Journal of Information Security,
Vol.5 No.4,
September
25,
2014
ABSTRACT: In the 21st century with the exponential
growth of the Internet, the vulnerability of the network which connects us is
on the rise at a very fast pace. Today organizations are spending millions of
dollars to protect their sensitive data from different vulnerabilities that
they face every day. In this paper, a new methodology towards implementing an
Intrusion Detection & Prevention System (IDPS) based on Artificial Neural
Network (ANN) onto Field Programmable Gate Array (FPGA) is proposed. This system
not only detects different network attacks but also prevents them from being
propagated. The parallel structure of an ANN makes it potentially fast for the
computation of certain tasks. FPGA platforms are the optimum and best choice
for the modern digital systems nowadays. The same feature makes ANN well suited
for implementation in FPGA technology. Hardware realization of ANN to a large
extent depends on the efficient implementation of a single neuron. However FPGA
realization of ANNs with a large number of neurons is still a challenging task. The proposed multilayer ANN based IDPS uses
multiple neurons for higher performance and greater accuracy. Simulation of the
design in MATLAB SIMULINK 2010b by using Knowledge Discovery and Data
Mining (KDD) CUP dataset shows a very good performance. Subsequently MATLAB HDL
coder was used to generate VHDL code for the proposed design that produced Intellectual
Property (IP) cores for Xilinx Targeted Design Platforms. For evaluation
purposes the proposed design was synthesized, implemented and tested onto
Xilinx Virtex-7 2000T FPGA device.