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Silveira, F., Flandre, D. and Jespers, P.G.A. (1996) A gm/ID Based Methodology for the Design of CMOS Analog Circuits and Its Application to the Synthesis of a Silicon-on-Insulator Micropower OTA. IEEE Journal of Solid-State Circuits, 31, 1314-1319. http://dx.doi.org/10.1109/4.535416

has been cited by the following article:

• TITLE: Experimental Demonstration of gm/ID Based Noise Analysis

  AUTHORS: Jack Ou, Pietro M. Ferreira, Jui-Chu Lee

  KEYWORDS: gm/ID Design Methodology; Noise Analysis; Flicker Noise

  JOURNAL NAME: Circuits and Systems, Vol.5 No.4, March 28, 2014

  ABSTRACT: Recent studies using BSIM3 models have suggested that noise depends on the transconductance-to-drain ratio gm/ID of a transistor. However, to the best of our knowledge, no experimental result demonstrating gm/ID dependent noise previously observed in simulation is available in the literature. This paper examines the underlying principles that make it possible to analyze noise using gm/ID based noise analysis. Qualitative discussion of normalized noise is presented along with experimental results from a 130 nm CMOS process. A close examination of the experimental results reveals that the device noise is width independent from 1 Hz to 10 kHz. Moreover, noise increases as gm/ID is reduced. The experiment observation that noise is width independent makes it possible for circuit designers to generate normalized parameters that are used to study noise intuitively and accurately.