Performance Improvement of the DSRC System Using a Novel S and Π-Decision Demapper

ISSN Print: 1945-3078
ISSN Online: 1945-3086
www.scirp.net/journal/wsn
E-mail: [email protected]

Citations

"Performance Improvement of the DSRC System Using a Novel S and Π-Decision Demapper"
written by Jeich MAR, Chi-Cheng KUO,
published by Wireless Sensor Network, Vol.1 No.4, 2009

has been cited by the following article(s):

[1]	Performance improvement of DSRC system using a novel receiver design
	Telecommunications (ICT), 2015 22nd International Conference on, 2015

[2]	Towards More Reliable MAC and PHY Layer Designs for High QoS Achievements for Safety Messaging in DSRC Systems
	2012

[3]	Rapid Prototyping for Evaluating Vehicular Communications
	2011

[4]	Improved performance at higher data rates of DSRC systems using a linear demapper
	Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on, 2011

[5]	FPGA-based Vehicular Channel Emulator for Real-Time Performance Evaluation of IEEE 802.11 p Transceivers
	EURASIP Journal on Wireless Communications and Networking, 2010

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