A Fast FPGA Implementation for Triple DES Encryption Scheme

Circuits and Systems

ISSN Print: 2153-1285
ISSN Online: 2153-1293
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"A Fast FPGA Implementation for Triple DES Encryption Scheme"
written by Edni Del Rosal, Sanjeev Kumar,
published by Circuits and Systems, Vol.8 No.9, 2017

has been cited by the following article(s):

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[2]	State‐of‐the‐Art 3DES Pipelined Cryptographic Engine Design Against Side‐Channel Attacks International Journal of Circuit Theory and Applications, 2024 DOI:10.1002/cta.4291

[3]	Adaptive Weighted Support Vector Machine classification method for privacy preserving in cloud over big data using hadoop framework Multimedia Tools and Applications, 2023 DOI:10.1007/s11042-023-15825-9

[4]	Network Information Security Data Protection Based on Data Encryption Technology Wireless Personal Communications, 2022 DOI:10.1007/s11277-022-09838-0

[5]	FPGA Implementation of a pipelined and pseudo-randomized TDES algorithm 2021 5th International Conference on Trends in Electronics and Informatics (ICOEI), 2021 DOI:10.1109/ICOEI51242.2021.9452952

[6]	A Low Area High Speed FPGA Implementation of AES Architecture for Cryptography Application Electronics, 2021 DOI:10.3390/electronics10162023

[7]	Design and FPGA Implementation of New Multidimensional Chaotic Map for Secure Communication Journal of Circuits, Systems and Computers, 2021 DOI:10.1142/S0218126621502807

[8]	Computational Science and Its Applications – ICCSA 2020 Lecture Notes in Computer Science, 2020 DOI:10.1007/978-3-030-58817-5_36

[9]	A Fast Implementation of the Rijndael Substitution Box for Cryptographic AES 2020 3rd International Conference on Data Intelligence and Security (ICDIS), 2020 DOI:10.1109/ICDIS50059.2020.00009

[10]	Improved Mix Column Computation of Cryptographic AES 2019 2nd International Conference on Data Intelligence and Security (ICDIS), 2019 DOI:10.1109/ICDIS.2019.00042

[11]	Programmable Cellular Automata Based Random Key Generation for One-Time Pad Encryption Using Unity Attractors Journal of Applied Security Research, 2019 DOI:10.1080/19361610.2019.1652475

[12]	Design and implementation of IP core for RoadRunneR-128 block cipher 2017 International Conference on Public Key Infrastructure and its Applications (PKIA), 2017 DOI:10.1109/PKIA.2017.8278961

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