SRAM Cell Leakage Control Techniques for Ultra Low Power Application: A Survey

Circuits and Systems

ISSN Print: 2153-1285
ISSN Online: 2153-1293
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"SRAM Cell Leakage Control Techniques for Ultra Low Power Application: A Survey"
written by Pavankumar Bikki, Pitchai Karuppanan,
published by Circuits and Systems, Vol.8 No.2, 2017

has been cited by the following article(s):

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[20]	Analytical modelling and design of 9T SRAM cell with leakage control technique
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[21]	Leakage Power Improvement in SRAM Cell with Clamping Diode Using Reverse Body Bias Technique
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[24]	SRAM Issues and Scrutiny at 45nm having Low Leakage Power and Leakage Current
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[26]	New improved Design for Low Leakage and high performance SRAM cell in ULP Applications
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[2]	Comparison of Techniques for Reducing Leakage Current in SRAM: A Study of Gated VDD, MTCMOS, and Clamping Diode Techniques 2024 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI), 2024 DOI:10.1109/RAEEUCCI61380.2024.10547970

[3]	12LP FinFET CMOS Ultra-Low Leakage SRAM Devices with 0.54pA/cell Istby 2024 35th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2024 DOI:10.1109/ASMC61125.2024.10545534

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[5]	Design and Analysis of a Radiation Resistant 12T SRAM Cell for Aerospace Applications Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering), 2023 DOI:10.2174/2352096516666230109141037

[6]	A Stacked SRAM Cell with Asymmetric Threshold Voltage for Low Leakage Power Applications 2023 Global Conference on Information Technologies and Communications (GCITC), 2023 DOI:10.1109/GCITC60406.2023.10426459

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[9]	A Stable Low Power Dissipating 9 T SRAM for Implementation of 4 × 4 Memory Array with High Frequency Analysis Wireless Personal Communications, 2022 DOI:10.1007/s11277-022-09865-x

[10]	An Experimental Evaluation of Resistive Defects and Different Testing Solutions in Low-Power Back-Biased SRAM Cells Electronics, 2022 DOI:10.3390/electronics11020203

[11]	Comparing different solutions for testing resistive defects in low-power SRAMs 2021 IEEE 22nd Latin American Test Symposium (LATS), 2021 DOI:10.1109/LATS53581.2021.9651760

[12]	Monolithic and single-functional-unit level integration of electronic and photonic elements: FET-LET hybrid 6T SRAM Photonics Research, 2021 DOI:10.1364/PRJ.420887

[13]	Design and Analysis of 8-Bit Stable SRAM for Ultra Low Power Applications 2020 5th International Conference on Devices, Circuits and Systems (ICDCS), 2020 DOI:10.1109/ICDCS48716.2020.243585

[14]	Proceedings of the 2nd International Conference on Data Engineering and Communication Technology Advances in Intelligent Systems and Computing, 2019 DOI:10.1007/978-981-13-1610-4_29

[15]	VLSI Design and Test Communications in Computer and Information Science, 2019 DOI:10.1007/978-981-13-5950-7_47

[16]	Analytical modelling and design of 9T SRAM cell with leakage control technique Analog Integrated Circuits and Signal Processing, 2019 DOI:10.1007/s10470-019-01483-1

[17]	Analysis of Low Power SRAM Design with Leakage Control Techniques 2019 TEQIP III Sponsored International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW), 2019 DOI:10.1109/IMICPW.2019.8933178

[18]	Analysis of low power novel SRAM design with self-biasing approach for ultra-low power applications 2019 TEQIP III Sponsored International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW), 2019 DOI:10.1109/IMICPW.2019.8933217

[19]	A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology 2018 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS), 2018 DOI:10.1109/iSES.2018.00011

[20]	New improved Design for Low Leakage and high performance SRAM cell in ULP Applications 2018 International Conference on Advances in Computing, Communication Control and Networking (ICACCCN), 2018 DOI:10.1109/ICACCCN.2018.8748301

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