An FPGA-Based HOG Accelerator with HW/SW Co-Design for Human Detection and Its Application to Crowd Density Estimation

ISSN Print: 1945-3116
ISSN Online: 1945-3124
www.scirp.net/journal/jsea
E-mail: [email protected]

Citations

"An FPGA-Based HOG Accelerator with HW/SW Co-Design for Human Detection and Its Application to Crowd Density Estimation"
written by Shih-Shinh Huang, Shih-Yu Lin, Pei-Yung Hsiao,
published by Journal of Software Engineering and Applications, Vol.12 No.1, 2019

has been cited by the following article(s):

[1]	A novel low-resource consumption and high-speed hardware implementation of HOG feature extraction on FPGA for human detection
	Integration, 2024

[2]	A Novel Hardware–Software Co-Design and Implementation of the HOG Algorithm
	2020

[3]	Analysis and Comparison of FPGA-Based Histogram of Oriented Gradients Implementations
	2020

[4]	FPGA-based Implementation of HOG Algorithm: Techniques and Challenges
	2019

[1]	A novel low-resource consumption and high-speed hardware implementation of HOG feature extraction on FPGA for human detection Integration, 2024 DOI:10.1016/j.vlsi.2024.102208

[2]	Analysis and Comparison of FPGA-Based Histogram of Oriented Gradients Implementations IEEE Access, 2020 DOI:10.1109/ACCESS.2020.2989267

[3]	A Novel Hardware–Software Co-Design and Implementation of the HOG Algorithm Sensors, 2020 DOI:10.3390/s20195655

[4]	FPGA-based Implementation of HOG Algorithm: Techniques and Challenges 2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM), 2019 DOI:10.1109/PACRIM47961.2019.8985056