Design and Analysing the Various Parameters of CMOS Circuit’s under Bi-Triggering Method Using Cadence Tools

ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.net/journal/cs
E-mail: [email protected]

Citations

"Design and Analysing the Various Parameters of CMOS Circuit’s under Bi-Triggering Method Using Cadence Tools"
written by A. Sridevi, V. Lakshmiprabha, N. Prabhu,
published by Circuits and Systems, Vol.7 No.9, 2016

has been cited by the following article(s):

[1]	Designing of a CMOS NAND Gate using INDEP with Bi-Triggering (Trig01) Method
	International Journal for Scientific Research & Development, 2017

[1]	Reconfigurable Combinational Logic Operations Using Triple‐Gated Feedback Field‐Effect Transistors for Logic‐In‐Memory Computing Advanced Electronic Materials, 2026 DOI:10.1002/aelm.202500536

[2]	Optimized leakage control in CMOS NAND gates: the in-triggering technique Physica Scripta, 2025 DOI:10.1088/1402-4896/ad9cfb