Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch – A Review

doi:10.4236/wsn.2011.38031

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Wireless Sensor Network, 2011, 3, 300-305

doi:10.4236/wsn.2011.38031 Published Online August 2011 (http://www.SciRP.org/journal/wsn)

Characterization Process of MOSFET with Virtual

Instrumentation for DP4T RF Switch—A Review

Viranjay M. Srivastava1, K. S. Yadav2, G. Singh1

1Department of Electronics and Communication Engineering, Jaypee University of Information Technology,

Solan, Indi a

2VLSI Design Group, Central Electro nics Engineering Research Institute (CEERI), Pilani, India

E-mail: [email protected]

Received June 26, 2011; revised July 22, 2011; accepted July 31, 2011

Abstract

With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless

communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has

good performances but only for a single operating frequency. For multiple operating frequencies, to trans-

mitting or receiving information through the multiple antennas systems, known as MIMO system, a new RF

switch is required which should be capable of operating with multiple antennas and frequencies as well as

minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw

(DP4T) RF switch and in this research article we are discussing a process for the characterization of the

MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are

grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of

the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented.

For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured optically. Some

of the calculated material parameters are away from the expected values. These errors might be due to sev-

eral factors such as a possible offset capacitance of the probes due to improper contact with the wafer which

is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineer-

ing Environment Programming (VEE Pro, a Agilent product).

Keywords: RF CMOS, LCR Meter, VEE Pro, Resistance of MOSFET, DP4T Switch, RF Switch, VLSI

1. Introduction

Currently, instruments as well as instrumentation tech-

nique have been replaced at an increasing pace by

hardware/ software mixed measurement oriented systems.

The software component provides the hardware extended

measuring capabilities and the instruments are thus

named virtual instruments [1]. With its growth and wide

applications, virtualization has come through a revival in

computer system community. Virtualization offers a lot

of benefits including flexibility, security, ease to con-

figuration and management, reduction of cost and so

forth, but at the same time it also brings a certain degree

of performance overhead. Furthermore, Virtual Machine

Monitor (VMM) is the core component of virtual ma-

chine (VM) system and its effectiveness greatly impacts

the performance of complete system [2]. Designed for

measurement precision, we use LCR meters which is

suitable for production applications as well as research

and development purpose. As shown in Figure 1, this

offers excellent performance at an affordable cost [3-5].

It has the properties of wide selection of frequency range

from few Hz to 3 GHz, frequency list sweep for con-

tinuous testing at multiple frequency points used for

general purpose testing of surface-mount components,

leaded components, materials, general purpose interface

bus (GPIB) and handler interface for easy test automa-

tion in production environment with 0.05% basic accu-

racy. By this device we can measure the parameters as

impedance (Z), admittance (Y), θ, resistance (R), Induc-

tance (L), capacitance (C), transconductance (X), mag-

netc field ( B), quality factor (Q), DC resistance (Rdc),

DC currnt (Idc), DC voltage (Vdc) [6,7].

This LCR meter supports the VEE programming en-

vironment, which provides simulated signal sources and

displays. We can experiment with program flow and data

V. M. SRIVASTAVA ET AL.

301

Figure 1. LCR meter.

processing with only LCR meter and VEE programming.

VEE provides an Instrument Manager and a Dynamic

input/output (I/O) server to simplify the tasks of discov-

ering, configuring, and managing external instruments

[8-10]. The VEE supports several types of instrument

drivers. Earlier, when the instruments were not available,

just press one button in the Instrument Manager to take a

driver “off line” and continue developing the program.

2. Earlier Works

Previous approaches to RF-MOSFET modeling involve

adding lump elements to a compact model for digital and

analog circuit designs, such as BSIM3, BSIM4, and

MM9, and they focus on how to build a reasonable sub-

circuit and how to extract their values according to eq-

uivalent circuits [11-13]. These methods consist of

analysis and optimization. Few attempts have been made

to build a scalable RF-MOSFET model, including the

layout-based extrinsic elements. For RF MOSFET mod-

eling, lots of issues need to be considered [14-16] espe-

cially the three most important parasitic components:

gate resistance Rg, which influences the input impedance

and noise performance of RF-MOSFETs [17,18].

Henry and Coumou [19] have presented a model for

thermal conductivity, specific heat and thermal diffusiv-

ity which are the essential properties of engineered plas-

tics, ceramics, composites and other materials, whether

for end-use products or processing applications. They

also presents fully automated instrumentation for direct

measurement of these properties on a wide variety of

materials. Gaioni et al. [20] has discussed a measuring

system that was developed to characterize the gate cur-

rent noise performances of CMOS devices with mini-

mum feature size in the 100 nm span. These devices play

an essential role in the design of present day mixed signal

integrated circuits, because of the advantages associated

with the scaling process. The reduction in the gate oxide

thickness brought about by CMOS technology down-

scaling leads to a nonnegligible gate current due to direct

tunneling phenomena; this current represents a noise

source which requires an accurate characterization for

optimum analog design. Cvjetkovic et al. [21] proposed a

laboratory helicopter model with two degrees of freedom

was developed to teach mechanical engineering students

static and dynamic characteristics and controls. They

performed different measurements and experiments with

the laboratory helicopter model both locally and re-

motely. Also, remote experiments are performed by us-

ing a web-based user interface for controlling the lab-

oratory equipment and an IP (Internet Protocol) camera

for observing the movements of the helicopter model.

Grout and Dasilva [22] have presented a language

used to describe the structure and capabilities (attributes)

of remote, or online, laboratories. The structure of the

presented language is provided with reference to the spe-

cific case study remote laboratory. This language can be

readily extended to describe current laboratory attributes

in more detail and to extend the language in order to

identify and present new laboratory attributes. Pradarelli

et al. [23] have addressed the local and remote use of an

Integrated Circuits (IC) Automated Test Equipment (ATE)

for both educational and engineering purposes. Here,

practical information regarding IC testing and network

setup for remote access are detailed, together with the

associated training program.

Lowe et al. [24] have discusses a novel approach to the

integration of support for multi-user distributed access to

a single remote laboratory instance. The approach retains

the benefits of the lightweight client inherent in the

underlying architecture. Pandey et al. [25] have

presented an automated evaluation procedure to

characterize MOS capacitors involving high-k gate

dielectrics. Suitability of LabView environment for

online web-based semiconductor device characterization

is demonstrated. Implementation of the algorithm for use

as a remote internet-based characterization tool, where the

client and server communicate with each other via web

services, was also presented.

3. Recent Overviews

Dasa and Biswas [26] have presented the impacts of an

ultrathin Si interfacial layer on the electrical properties of

GaAs MOS capacitors fabricated using RF-sputtered

HfAlOx as the dielectric. It is found that the Si passivated

GaAs MOS capacitor exhibits excellent electrical prop-

erties compared with the non-passivated ones. Orgiu et

al. [27] has found that the charge transport across the

302 V. M. SRIVASTAVA ET AL.

bulk of a polymeric dielectric layer exerts a strong influ-

ence on the performances of the organic field-effect tran-

sistors. In particular it gives place to a large hysteresis on

the transfer curves which impacts the extraction and the

straight interpretation of major device parameters such as

the field-effect mobility and the threshold voltage. This

charge contribution was highlighted through space-charge

limited current measurements carried out on MIM ca-

pacitors having a polymeric dielectric as the insulating

layer.

Recently, the CMOS switch uses the technique of

silicon-on-insulator (SOI), which is attractive because of

the high speed performance, low power consumption, its

scalability and effective potential. As compared to bulk

silicon substrate, the architecture of SOI MOSFETs is

more flexible due to several parameters such as thick-

nesses of film and buried oxide, substrate doping, and

back gate bias which can be used for optimization and

scaling. The short-channel effects are mitigated in ultra-

thin SOI films. The continuous downscaling of CMOS

technology has greatly improved the RF performance of

transistors. These improvements to the CMOS manufac-

turing process have made it an excellent choice for RF

integrated circuit (RFIC) design. The success of RFIC

design strongly relies on accurate device models. How-

ever, general device models provided by semiconductor

foundries are not guaranteed within a certain bias and

frequency range, and they also offer poor correlation

between the device layouts and the RF characteristics.

Transistor layout and its wiring effect are considered as

one of the crucial issues for gigahertz circuit design,

since they directly affect the RF transceiver performance

[28-31].

Due to the single operating frequency, simple switch

has a limited data transfer rate. Therefore, a Double-Pole

Double-Throw (DPDT) switch is designed to solve the

problem. The DPDT switch has dual antenna and dual

ports, one port for transmitting and the other for receiv-

ing, which is not sufficient for MIMO systems. Hence,

DP4T switch is designed to enhance the switch perfor-

mance for MIMO applications [32]. This DP4T switch

can send or receive two parallel data streams simultane-

ously.

4. Process for Characterization

In this article, we discussed the application of LCR meter

as virtual instruments for the purpose of RF CMOS

characterization with measurement of some parameters

with VEE programming as shown in Figure 2 [33-35].

Firstly, we put the designed die on the platform of

LCR meter, and switch ON the LCR meter then setup the

meter according to measurement condition. Perform the

measurements by varying the voltage from +5V to –5V

and then back to +5V again or from +7V to –7V de-

pending upon applications and also varying frequency

from low to high depending upon the MOS structure

from 1MHz to some RF frequency as GHz [36,37]. The

required parameter will display on the screen of LCR

meter as well as on computer monitor where VEE pro-

gramming is stored. By this process we can perform the

measurement and take the reading of required parameters.

Some of the calculated material parameters were far

from the expected values might be due several factors

like a possible offset capacitance of the probes due to

improper contact with the wafer which is measured using

LCR meter with help of Visual Engineering Environment.

To solve those problems, we suggest a process to recali-

bration of the probes, vary the voltage with smaller in-

crements and another possibility is that the heating

temperature for MOS device should approximately 200oC,

because at lower temperature effect on the oxide charges

will be negligible whereas at high temperature arrange-

ment of oxide charges will perturb. To solve this problem,

take the two readings of C-V curve one before heating

Start the LCR

Meter

Place wafer on

latfor

Switch ON the

LCR meter

Run VEE

rogramming

Select the

parameter

Result on

screen

Figure 2. Program flow chart for RF CMOS characteriza-

tion.

V. M. SRIVASTAVA ET AL.

303

. 381-386.

the device and other reading after heating, so that we can

avoid the dislocation of charges. Also probes could have

internal capacitances of their own that has not been ac-

counted in the software of the machine, so the machine

would actually be reading the series equivalent capaci-

tance of its probes and the wafer capacitors. To solve that

problem, the machine should be calibrated using refer-

ence wafers whose properties are well known.

5. Conclusions

Based on virtual instrumentation characterization of a RF

CMOS, a capacitor which resulted in erroneous values of

material parameters, mainly the substrate dopant concen-

tration, on which most of the other parameters are based,

we recognized those errors and correct that with a test

wafer measurement for the different parameters.

A RF CMOS has the properties as fixed tuned match-

ing networks, low Q matching networks, ruggedness,

high power output, mounting flange packages, and Sili-

con grease. Power gain (a measure of power amplifica-

tion, is the ratio of output power to input power, dB),

Noise figure (a measure of the amount of noise added

during normal operation, is the ratio of the signal-to-

noise ratio at the input and the signal-to-noise ratio at the

output, dB), High power dissipation (a measure of total

power consumption, W or mW). Most of these parame-

ters can be measured using the processes as in Figure 2.

Some bipolar RF CMOS transistors are suitable for auto-

motive, commercial or general industrial applications.

We can calculate the drain current, resistance, poten-

tial barrier, gate voltage and control voltage. After the

characterization, we apply the device for the application

of DP4T switches [32]. We can also apply this charac-

terization process for the double-gate MOSFET and

Surrounding-gate MOSFET [23,38].

Radiation characteristics and clinical implementation

of an implantable MOSFET radiation detector (dosimeter)

can be discussed with the proposed process. The dosime-

ter is powered by radio frequency telemetry eliminating

the need for a power source inside the dosimeter. The

data can be accessed telemetrically for each treatment

day during the course of therapy. The detector has been

validated in vitro to confirm its accuracy. Variance be-

tween predicted and measured dose in patients is dis-

cussed. Factors such as patient setup, treatment plan er-

ror, and physiologic motion can affect the accuracy of

dose delivery in moving from in vitro to in vivo dose

measurements [39]. A method for the extraction of dam-

age metrics based upon the transient response of the

drain-to-source current Ids to a step input to the gate of

the device can also be performed [40]. Systematic mis-

match at the drain capacitance of the IA with the current

mirror load is the major contribution to a low CMRR at

high frequencies. To mitigate this effect, one can use the

capacitive neutralization and demonstrated its effective-

ness from the fabricated CMOS instrumentation ampli-

fier chip samples, achieving an average CMRR [41].

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